mirror of https://github.com/YosysHQ/yosys.git
67 lines
1.0 KiB
Plaintext
67 lines
1.0 KiB
Plaintext
# Register-File RAMs for NanoXplore NG-ULTRA
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# Dual-port RAMs.
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# NX_RFB_U in mode 0 (DPREG)
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# NX_RFB_U in mode 2 (NX_XRFB_64x18)
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# NX_RFB_U in mode 3 (NX_XRFB_32x36)
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ram distributed $__NX_RFB_U_DPREG_ {
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option "MODE" 0 {
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cost 30;
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widthscale 30;
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abits 5;
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widths 18 global;
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}
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option "MODE" 2 {
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cost 50;
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widthscale 30;
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abits 6;
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widths 18 global;
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}
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option "MODE" 3 {
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cost 50;
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widthscale 30;
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abits 5;
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widths 36 global;
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}
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init no_undef;
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port sw "W" {
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clock anyedge;
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}
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port ar "R" {
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}
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}
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# Single-port RAMs.
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# NX_RFB_U in mode 1 (SPREG)
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ram distributed $__NX_RFB_U_SPREG_ {
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cost 30;
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widthscale;
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abits 5;
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width 18;
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init no_undef;
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port arsw "RW" {
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clock anyedge;
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}
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}
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# Single write dual read RAMs.
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# NX_RFB_U in mode 4 (NX_XRFB_2R_1W)
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ram distributed $__NX_XRFB_2R_1W_ {
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cost 40;
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widthscale 30;
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abits 5;
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width 18;
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init no_undef;
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port sw "W" {
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clock anyedge;
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}
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port ar "A" {
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}
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port ar "B" {
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}
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}
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