mirror of https://github.com/YosysHQ/yosys.git
115 lines
3.9 KiB
C++
115 lines
3.9 KiB
C++
/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "kernel/yosys.h"
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#include "kernel/sigtools.h"
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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bool did_something;
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// scratchpad configurations for pmgen
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int shiftadd_max_ratio;
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#include "passes/pmgen/peepopt_pm.h"
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struct PeepoptPass : public Pass {
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PeepoptPass() : Pass("peepopt", "collection of peephole optimizers") { }
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void help() override
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{
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// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
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log("\n");
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log(" peepopt [options] [selection]\n");
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log("\n");
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log("This pass applies a collection of peephole optimizers to the current design.\n");
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log("\n");
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log("This pass employs the following rules by default:\n");
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log("\n");
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log(" * muldiv - Replace (A*B)/B with A\n");
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log("\n");
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log(" * shiftmul - Replace A>>(B*C) with A'>>(B<<K) where C and K are constants\n");
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log(" and A' is derived from A by appropriately inserting padding\n");
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log(" into the signal. (right variant)\n");
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log("\n");
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log(" Analogously, replace A<<(B*C) with appropriate selection of\n");
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log(" output bits from A<<(B<<K). (left variant)\n");
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log("\n");
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log(" * shiftadd - Replace A>>(B+D) with (A'>>D)>>(B) where D is constant and\n");
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log(" A' is derived from A by padding or cutting inaccessible bits.\n");
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log(" Scratchpad: 'peepopt.shiftadd.max_data_multiple' (default: 2)\n");
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log(" limits the amount of padding to a multiple of the data, \n");
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log(" to avoid high resource usage from large temporary MUX trees.\n");
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log("\n");
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log("If -formalclk is specified it instead employs the following rules:\n");
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log("\n");
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log(" * clockgateff - Replace latch based clock gating patterns with a flip-flop\n");
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log(" based pattern to prevent combinational paths from the\n");
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log(" output to the enable input after running clk2fflogic.\n");
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log("\n");
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) override
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{
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log_header(design, "Executing PEEPOPT pass (run peephole optimizers).\n");
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bool formalclk = false;
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size_t argidx;
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for (argidx = 1; argidx < args.size(); argidx++)
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{
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if (args[argidx] == "-formalclk") {
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formalclk = true;
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continue;
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}
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break;
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}
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extra_args(args, argidx, design);
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// limit the padding from shiftadd to a multiple of the input data
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// during techmap it creates (#data + #padding) * log(shift) $_MUX_ cells
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// 2x implies there is a constant shift larger than the input-data which should be extremely rare
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shiftadd_max_ratio = design->scratchpad_get_int("peepopt.shiftadd.max_data_multiple", 2);
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for (auto module : design->selected_modules())
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{
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did_something = true;
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while (did_something)
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{
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did_something = false;
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peepopt_pm pm(module);
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pm.setup(module->selected_cells());
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if (formalclk) {
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pm.run_formal_clockgateff();
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} else {
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pm.run_shiftadd();
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pm.run_shiftmul_right();
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pm.run_shiftmul_left();
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pm.run_muldiv();
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}
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}
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}
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}
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} PeepoptPass;
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PRIVATE_NAMESPACE_END
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