riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
2,167 Commits 75 Branches 48 Tags 61 MiB
Commit Graph

6 Commits

Author SHA1 Message Date
Clifford Wolf 604c097f98 fix for python 2.6.6 2015-03-20 09:10:02 +01:00
Clifford Wolf 28cf48e31f Some improvements in FSM mapping and recoding 2014-08-14 11:22:45 +02:00
Clifford Wolf 1dd8252169 Added test_verific mode to tests/fsm/generate.py 2014-08-12 15:43:30 +02:00
Clifford Wolf 788bd02f97 Fixed FSM mapping for multiple reset-like signals 2014-08-10 12:04:02 +02:00
Clifford Wolf 51aa5544fb Improved FSM tests 2014-08-08 15:08:11 +02:00
Clifford Wolf c07774b0b6 Added FSM test bench 2014-08-08 13:12:18 +02:00