yosys

mirror of https://github.com/YosysHQ/yosys.git

Author	SHA1	Message	Date
Marcin Kościelnicki	ce250b341c	synth_xilinx: Initial Spartan 6 block RAM inference support.	2019-07-11 14:45:48 +02:00
Larry Doolittle	efaef82f75	Squelch trailing whitespace, including meta-whitespace	2018-03-11 16:03:41 +01:00
Clifford Wolf	c475deec6c	Switched to Python 3	2015-08-22 09:59:33 +02:00
Clifford Wolf	9596fe74de	Another bugfix for ice40 and xilinx brams_init make rules	2015-08-16 21:39:34 +02:00
Clifford Wolf	8520b7fbe0	Added support for initialized xilinx brams	2015-04-06 17:07:10 +02:00