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13420 Commits

Author SHA1 Message Date
github-actions[bot] f5420d720c Bump version 2024-02-04 00:17:08 +00:00
Catherine 3caac53827
Merge pull request #4128 from whitequark/check-cell 
Add `$check` cell to represent assertions with messages
 2024-02-03 18:39:00 +00:00
Jannis Harder ffb82df33c Additional tests for FV $check compatibility 2024-02-02 16:07:10 +01:00
hakan-demirli 7dbe288d6f fix: descriptive logs 2024-02-02 02:39:04 +03:00
hakan-demirli c1d3288654 chore: use similar variable/function names 2024-02-02 01:25:58 +03:00
Catherine c7bf0e3b8f Add new `$check` cell to represent assertions with a message. 2024-02-01 20:10:39 +01:00
Jannis Harder e1a59ba80b async2sync, clk2fflogic: Add support for $check and $print cells 2024-02-01 20:10:39 +01:00
Jannis Harder 6c4902313b chformal: Support $check cells and add chformal -lower 
This adds support for `$check` cells in chformal and adds a `-lower`
mode which converts `$check` cells into `$assert` etc. cells with a
`$print` cell to output the `$check` message.
 2024-02-01 20:10:39 +01:00
Jannis Harder 331ac5285f tests: Run async2sync before sat and/or sim to handle $check cells 
Right now neither `sat` nor `sim` have support for the `$check` cell.
For formal verification it is a good idea to always run either
async2sync or clk2fflogic which will (in a future commit) lower `$check`
to `$assert`, etc.

While `sim` should eventually support `$check` directly, using
`async2sync` is ok for the current tests that use `sim`, so this commit
also runs `async2sync` before running sim on designs containing
assertions.
 2024-02-01 16:14:11 +01:00
Jannis Harder 2baa578d94 Remove too fragile smtlib2_module test 
This compares the write_smt2 output pretty much verbatim, which contains
auto generated private names and fixes an arbitrary ordering. The tested
functionality is also covered by SBY tests which actually interpret the
write_smt2 output using an SMT solver and thus are much more robust, so
we can safely remove this test.
 2024-02-01 16:14:11 +01:00
N. Engelhardt 9f27923782
Merge pull request #4173 from YosysHQ/verific_complex 
verific: add option to skip simplifying complex ports
 2024-02-01 12:08:40 +01:00
Martin Povišer a84fa0a277 connect: Do interpret selection arguments 
Instead of silently ignoring what would ordinarily be the selection
arguments to a pass, interpret those and mark the support in the help
message.
 2024-02-01 10:28:36 +01:00
github-actions[bot] bbb8ad5997 Bump version 2024-02-01 00:16:28 +00:00
hakan-demirli dd5dc06863 fix: save history file on windows 2024-01-31 20:14:32 +03:00
hakan-demirli 820232eaca fix: function naming and locations 2024-01-31 19:50:31 +03:00
Martin Povišer 6c4bc5aae5
Merge pull request #4165 from phsauter/shiftadd-offset-fix 
peepopt: handle offset too large in `shiftadd`
 2024-01-31 13:47:39 +01:00
Philippe Sauter cbdf9b2f9c peepopt: handle empty src-attribute in shiftadd 2024-01-31 13:07:01 +01:00
github-actions[bot] 3bc83c6533 Bump version 2024-01-31 00:15:44 +00:00
hakan-demirli 8c731658c2
Merge branch 'YosysHQ:master' into master 2024-01-31 01:03:59 +03:00
hakan-demirli 039634d973 feat: mkdir with tree 2024-01-31 01:03:01 +03:00
Claire Xenia Wolf 4fa314c0bd Add API to overwrite existing pass from plugin 
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
 2024-01-30 17:51:11 +01:00
Miodrag Milanovic db1de5fe5d verific: add option to skip simplifying complex ports 2024-01-30 16:33:44 +01:00
Martin Povišer 3537976477
Merge pull request #4163 from QuantamHD/fix_write_verilog 
write_verilog: Making sure BUF cells are converted to expressions.
 2024-01-30 10:58:42 +01:00
Philippe Sauter 7f8b6dd982 peepopt: delete unnecessary comment in shiftadd 2024-01-30 09:51:21 +01:00
Miodrag Milanović b572e1af9f
Merge pull request #4171 from yrabbit/sdp-wre 
gowin: Fix SDP write enable port.
 2024-01-30 08:49:50 +01:00
YRabbit 79c5a06673 gowin: Fix SDP write enable port. 
This primitive does not have a separate WRE port, so we regulate writing
using Clock Enable.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2024-01-30 17:06:59 +10:00
Ethan Mahintorabi 3076875fff
removing call to dump_attributes to remove possibility of generating invalid verilog 
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
 2024-01-30 00:56:07 +00:00
Krystine Sherwin fae35fe98b
Docs: example_synth fifo update 
More detail on `memory_libmap`, the `$__ICE40_RAM4K_` intermediate step, and the
bizarre opt output.
 2024-01-30 13:34:29 +13:00
Krystine Sherwin fd0c574942
Docs: changes/todos from JF 2024-01-30 13:33:07 +13:00
Krystine Sherwin 9878e69d6c
Docs: tidying 
- Use `:file:` role for file names, as well as `:makevar:` and `:program:`.
- Remove deprecated `linux-arm` and `linux-riscv64` oss-cad-suite targets.
- Add link to ABC.
- More (and better) links to code examples.  Formatted `:file:` text with link
  to source on github.
- Includes a few extra todos (mostly picking up inline code blocks and a couple
  intro reminders).
- Fixing a few missing `:yoscrypt:` and `:cmd:ref:` tags.
- Reflowing some paragraphs for spacing/width.
 2024-01-30 13:31:00 +13:00
github-actions[bot] 112bcb0907 Bump version 2024-01-30 00:15:11 +00:00
N. Engelhardt 027cb31e9d
Merge pull request #4161 from YosysHQ/nak/add_sig_extract_asserts 
SigSpec/SigChunk::extract(): assert offset/length are not out of range
 2024-01-29 16:11:01 +01:00
Martin Povišer 2f4dd9961c
Merge pull request #4162 from jix/sim-print-sampling 
sim: Bring $print trigger/sampling semantics in line with FFs
 2024-01-29 15:39:46 +01:00
N. Engelhardt a9fe85c2d0
Merge pull request #4141 from YosysHQ/small_build 
Make small build links, and support Verific small build
 2024-01-29 15:17:39 +01:00
Jannis Harder fd838a99ce
Merge pull request #4140 from jix/writer_aiger_sccs 
write_aiger: Detect and error out on combinational loops
 2024-01-29 15:14:54 +01:00
N. Engelhardt 2282351172
Merge pull request #4118 from povik/fix-conn-on-wire-delete 
rtlil: Fix handling of connections on wire deletion
 2024-01-29 15:08:48 +01:00
Martin Povišer 23c9828d70 opt_clean: Remove dead branch 2024-01-29 11:26:44 +01:00
Martin Povišer 7afc0696e2 opt_clean: Assert an impossible path isn't taken 2024-01-29 11:26:44 +01:00
Martin Povišer ec065186d3 opt_clean: Add commentary around wire cleaning, NFC 2024-01-29 11:26:44 +01:00
Martin Povišer ea3dc7c1b4 rtlil: Add wire deletion test 2024-01-29 11:25:54 +01:00
Martin Povišer c035289383 rtlil: Do not create dummy wires when deleting wires in connections 2024-01-29 11:25:54 +01:00
Martin Povišer d6600fb1d5 rtlil: Fix handling of connections on wire deletion 2024-01-29 11:25:54 +01:00
github-actions[bot] 4585d60b8a Bump version 2024-01-28 00:17:09 +00:00
Miodrag Milanović 887c90500a
Merge pull request #4166 from YosysHQ/update-workflows 
Update workflows to Node.js 20
 2024-01-27 09:06:23 +01:00
Miodrag Milanović 54c5431cfc
Merge pull request #4167 from yrabbit/wip-byte-enable 
gowin: Change BYTE ENABLE handling.
 2024-01-27 09:04:42 +01:00
YRabbit a5fdf3f881 gowin: Change BYTE ENABLE handling. 
When inferring we allow writing to all bytes for now.

Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
 2024-01-27 17:19:49 +10:00
Krystine Sherwin a7e1c6e530
codeowners: adopting docs folder 2024-01-27 11:32:08 +13:00
Krystine Sherwin 7e524e0588
Update workflows to Node.js 20 
Node.js 16 actions are deprecated.  For more information see: https://github.blog/changelog/2023-09-22-github-actions-transitioning-from-node-16-to-node-20/.
 2024-01-27 11:20:48 +13:00
Philippe Sauter 68a9aa7c29 peepopt: handle offset too large in `shiftadd` 
If the offset is larger than the signal itself,
meaning the signal is completely shifted out,
it tried to extract a negative amount of bits from the old signal.

This RTL pattern is suspicious since it is a complicated way of
arriving at a constant value, so we warn the user.
 2024-01-26 16:44:30 +01:00
Krystine Sherwin 22808e0e3f
Docs: work on selections.rst 
Highlighting the difference between `select prod %ci` and `select prod %ci2` by
introducing `sumproud.out` using the `dump` command.

Playing around with advanced cone example code.
 2024-01-26 17:29:59 +13:00