riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
4,094 Commits 76 Branches 48 Tags 62 MiB
Commit Graph

12 Commits

Author SHA1 Message Date
Staf Verhaegen 92eb841f0a Value of properties can be expression. 
Example found in the 2007.03 Liberty Reference Manual that was also found
in the wild:

    input_voltage(CMOS) {
        vil : 0.3 * VDD ;
        vih : 0.7 * VDD ;
        vimin : -0.5 ;
        vimax : VDD + 0.5 ;
    }

Current implementation just parses the expression but no interpretation is done.
 2018-01-03 21:37:17 +00:00
Clifford Wolf 6c84341f22 Fixed trailing whitespaces 2015-07-02 11:14:30 +02:00
Clifford Wolf 8b1e0bdd9e Fixed handling of quotes in liberty parser 2015-03-18 16:03:19 +01:00
Clifford Wolf f41378af8c Fixed clang (svn trunk) warnings 2015-02-18 14:54:22 +01:00
Clifford Wolf c21c9dab1e Removed CHECK() macro from libparse.cc (was using non-std c features) 2014-10-13 17:22:06 +02:00
Clifford Wolf f9a307a50b namespace Yosys 2014-09-27 16:17:53 +02:00
Clifford Wolf 19cff41eb4 Changed frontend-api from FILE to std::istream 2014-08-23 15:03:55 +02:00
Clifford Wolf fcae92868d Fixed dumping of timing() { .. } block in libparse 2014-03-09 15:16:07 +01:00
Clifford Wolf c1ed2607fb Added support for // comments in liberty parser 2014-01-25 06:32:16 +01:00
Clifford Wolf 9a00980129 renamed LibertyParer to LibertyParser 2014-01-14 18:57:47 +01:00
Clifford Wolf c1da7661a5 Added "+" to list of liberty token characters 2014-01-14 18:56:29 +01:00
Clifford Wolf b6db2d9b33 Moved dfflibmap from passes/dfflibmap to passes/techmap 2013-10-16 15:32:26 +02:00