Eddie Hung
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53fc3ed645
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aiger: -xaiger to read $_DFF_[NP]_ back with new clocks created
according to mergeability class, and init state as cell attr
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2020-05-14 10:33:56 -07:00 |
Eddie Hung
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73526a6f10
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read_aiger: also parse abc9_mergeability
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2020-01-22 14:21:25 -08:00 |
Eddie Hung
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ee95fa959a
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read_aiger: uniquify wires with $aiger<autoidx> prefix
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2020-01-13 21:28:27 -08:00 |
Eddie Hung
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96db05aaef
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parse_xaiger to not take box_lookup
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2019-12-31 17:06:03 -08:00 |
Eddie Hung
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03ec8d6551
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Run "clean" on mapped_mod in its own design
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2019-08-07 09:54:27 -07:00 |
Eddie Hung
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b21d29598a
|
Consistency
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2019-06-12 09:40:51 -07:00 |
Eddie Hung
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f7a9769c14
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Merge remote-tracking branch 'origin/master' into xaig
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2019-06-12 08:50:39 -07:00 |
Eddie Hung
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a04521c6b7
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Fix read_aiger -- create zero driver, fix init width, parse 'b'
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2019-06-07 11:07:15 -07:00 |
Eddie Hung
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bca3cf6843
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Merge branch 'master' into xaig
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2019-04-08 16:31:59 -07:00 |
Eddie Hung
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3e89cf68bd
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Add author name
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2019-03-19 08:52:06 -07:00 |
Eddie Hung
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13bf036bd6
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Use ConstEval to compute LUT masks
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2019-02-13 17:00:00 -08:00 |
Eddie Hung
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e9df9a466a
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Add support for read_aiger -wideports
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2019-02-12 12:58:10 -08:00 |
Eddie Hung
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06ba81d41f
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Add support for read_aiger -map
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2019-02-12 12:16:37 -08:00 |
Eddie Hung
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0124512f28
|
Add read_xaiger
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2019-02-11 15:19:17 -08:00 |
Eddie Hung
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fb8ad440a3
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Allow module name to be determined by argument too
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2019-02-08 12:40:43 -08:00 |
Eddie Hung
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f1befe1b44
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Refactor into AigerReader class
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2019-02-08 12:04:26 -08:00 |
Eddie Hung
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cc0b723484
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WIP
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2019-02-06 12:19:48 -08:00 |