Clifford Wolf
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cdae8abe16
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Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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7bd2d1064f
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Using log_assert() instead of assert()
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2014-07-28 11:27:48 +02:00 |
Clifford Wolf
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10e5791c5e
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Refactoring: Renamed RTLIL::Design::modules to modules_
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2014-07-27 11:18:30 +02:00 |
Clifford Wolf
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4c4b602156
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Refactoring: Renamed RTLIL::Module::cells to cells_
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2014-07-27 01:51:45 +02:00 |
Clifford Wolf
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97a59851a6
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Added RTLIL::Cell::has(portname)
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2014-07-26 16:11:28 +02:00 |
Clifford Wolf
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f8fdc47d33
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Manual fixes for new cell connections API
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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b7dda72302
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Changed users of cell->connections_ to the new API (sed command)
git grep -l 'connections_' | xargs sed -i -r -e '
s/(->|\.)connections_\["([^"]*)"\] = (.*);/\1set("\2", \3);/g;
s/(->|\.)connections_\["([^"]*)"\]/\1get("\2")/g;
s/(->|\.)connections_.at\("([^"]*)"\)/\1get("\2")/g;
s/(->|\.)connections_.push_back/\1connect/g;
s/(->|\.)connections_/\1connections()/g;'
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2014-07-26 15:58:23 +02:00 |
Clifford Wolf
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cc4f10883b
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Renamed RTLIL::{Module,Cell}::connections to connections_
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2014-07-26 11:58:03 +02:00 |
Clifford Wolf
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2bec47a404
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Use only module->addCell() and module->remove() to create and delete cells
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2014-07-25 17:56:19 +02:00 |
Clifford Wolf
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4b4048bc5f
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SigSpec refactoring: using the accessor functions everywhere
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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a233762a81
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SigSpec refactoring: renamed chunks and width to __chunks and __width
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2014-07-22 20:39:37 +02:00 |
Clifford Wolf
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05483619f0
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Some fixes to improve determinism
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2013-08-09 12:42:32 +02:00 |
Clifford Wolf
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0f5378b559
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Improved method for finding fsm_expand candidates
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2013-03-25 02:24:11 +01:00 |
Clifford Wolf
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4bd6f1ee8e
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Changed fsm_expand to merge multiplexers more aggressively
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2013-03-24 17:59:44 +01:00 |
Johann Glaser
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cd8008bda0
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fixed typos
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2013-03-18 07:28:31 +01:00 |
Clifford Wolf
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a338d1a082
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Added help messages for fsm_* passes
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2013-03-01 12:35:12 +01:00 |
Clifford Wolf
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7764d0ba1d
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initial import
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2013-01-05 11:13:26 +01:00 |