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2 Commits

Author SHA1 Message Date
Icenowy Zheng 7854d5ba21 anlogic: fix dbits of Anlogic Eagle DRAM16X4 
The dbits of DRAM16X4 is wrong set to 2, which leads to waste of DRAM
bits.

Fix the dbits number in the RAM configuration.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-18 14:38:44 +08:00
Icenowy Zheng d53a2bd1d3 anlogic: add support for Eagle Distributed RAM 
The MSLICEs on the Eagle series of FPGA can be configured as Distributed
RAM.

Enable to synthesis to DRAM.

As the Anlogic software suite doesn't support any 'bx to exist in the
initializtion data of DRAM, do not enable the initialization support of
the inferred DRAM.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
 2018-12-17 23:20:40 +08:00