Clifford Wolf
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c7f81e4e49
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Added "test_cell -simlib -v"
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2014-09-01 15:37:21 +02:00 |
Clifford Wolf
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e3664066d5
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Added eval testing to test_cell
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2014-08-31 18:08:42 +02:00 |
Clifford Wolf
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8649b57b6f
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Added $lut support in test_cell, techmap, satgen
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2014-08-31 17:43:31 +02:00 |
Clifford Wolf
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3b9157f9a6
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Added "test_cell -s <seed>"
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2014-08-16 19:44:31 +02:00 |
Clifford Wolf
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13f2f36884
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RIP $safe_pmux
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2014-08-14 11:39:46 +02:00 |
Clifford Wolf
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cdae8abe16
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Renamed port access function on RTLIL::Cell, added param access functions
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2014-07-31 16:38:54 +02:00 |
Clifford Wolf
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6ca0c569d9
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Added "techmap -assert"
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2014-07-31 02:21:41 +02:00 |
Clifford Wolf
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ceecf5b153
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Improvements in test_cell
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2014-07-30 18:49:12 +02:00 |
Clifford Wolf
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273383692a
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Added "test_cell" command
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2014-07-29 22:07:41 +02:00 |