Clifford Wolf
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f1a2fd966f
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Now only use value from "initial" when no matching "always" block is found
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2013-03-31 11:51:12 +02:00 |
Clifford Wolf
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161565be10
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Added AST_INITIAL (before verilog "initial" was mapped to AST_ALWAYS)
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2013-03-31 11:19:11 +02:00 |
Clifford Wolf
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6a382f2aba
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Fixed handling of unconditional generate blocks
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2013-03-26 09:44:54 +01:00 |
Clifford Wolf
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227520f94d
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Added nosync attribute and some async reset related fixes
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2013-03-25 17:13:14 +01:00 |
Clifford Wolf
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a321a5c412
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Moved stand-alone libs to libs/ directory and added libs/subcircuit
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2013-02-27 09:32:19 +01:00 |
Clifford Wolf
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7764d0ba1d
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initial import
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2013-01-05 11:13:26 +01:00 |