riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
4,509 Commits 76 Branches 48 Tags 62 MiB
Commit Graph

3 Commits

Author SHA1 Message Date
Diego H 819ca73096 Changes in GoWin synth commands and ALU primitive support 2018-12-03 20:08:35 -06:00
Clifford Wolf e9d73d2ee0 Indenting fixes in gowin sim cell lib 2016-11-08 18:54:00 +01:00
Clifford Wolf cae5131bac Added initial version of "synth_gowin" 2016-11-01 11:31:13 +01:00