Start unification effort for machxo2 and ecp5

This commit is contained in:
Miodrag Milanovic 2023-03-18 18:11:50 +01:00 committed by myrtle
parent 4d7e9e2e5d
commit ff9f1fb86e
4 changed files with 23 additions and 31 deletions

View File

@ -1,6 +1,7 @@
OBJS += techlibs/machxo2/synth_machxo2.o OBJS += techlibs/machxo2/synth_machxo2.o
$(eval $(call add_share_file,share/machxo2,techlibs/ecp5/cells_io.vh))
$(eval $(call add_share_file,share/machxo2,techlibs/machxo2/cells_map.v)) $(eval $(call add_share_file,share/machxo2,techlibs/machxo2/cells_map.v))
$(eval $(call add_share_file,share/machxo2,techlibs/machxo2/cells_sim.v)) $(eval $(call add_share_file,share/machxo2,techlibs/machxo2/cells_sim.v))

View File

@ -25,10 +25,6 @@ module \$lut (A, Y);
endmodule endmodule
// DFFs // DFFs
module \$_DFF_P_ (input D, C, output Q); FACADE_FF #(.CEMUX("1"), .CLKMUX("CLK"), .LSRMUX("LSR"), .REGSET("RESET")) _TECHMAP_REPLACE_ (.CLK(C), .LSR(1'b0), .DI(D), .Q(Q)); endmodule module \$_DFF_P_ (input D, C, output Q); TRELLIS_FF #(.CEMUX("1"), .CLKMUX("CLK"), .LSRMUX("LSR"), .REGSET("RESET")) _TECHMAP_REPLACE_ (.CLK(C), .LSR(1'b0), .DI(D), .Q(Q)); endmodule
// IO- "$__" cells for the iopadmap pass. `include "cells_io.vh"
module \$__FACADE_OUTPAD (input I, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .T(1'b0)); endmodule
module \$__FACADE_INPAD (input I, output O); FACADE_IO #(.DIR("INPUT")) _TECHMAP_REPLACE_ (.PAD(I), .O(O)); endmodule
module \$__FACADE_TOUTPAD (input I, T, output O); FACADE_IO #(.DIR("OUTPUT")) _TECHMAP_REPLACE_ (.PAD(O), .I(I), .T(T)); endmodule
module \$__FACADE_TINOUTPAD (input I, T, output O, inout B); FACADE_IO #(.DIR("BIDIR")) _TECHMAP_REPLACE_ (.PAD(B), .I(I), .O(O), .T(T)); endmodule

View File

@ -11,7 +11,7 @@ module LUT4 #(
assign Z = A ? s1[1] : s1[0]; assign Z = A ? s1[1] : s1[0];
endmodule endmodule
module FACADE_FF #( module TRELLIS_FF #(
parameter GSR = "ENABLED", parameter GSR = "ENABLED",
parameter CEMUX = "1", parameter CEMUX = "1",
parameter CLKMUX = "0", parameter CLKMUX = "0",
@ -77,7 +77,7 @@ endmodule
/* For consistency, input order matches TRELLIS_SLICE even though the BELs in /* For consistency, input order matches TRELLIS_SLICE even though the BELs in
prjtrellis were filled in clockwise order from bottom left. */ prjtrellis were filled in clockwise order from bottom left. */
module FACADE_SLICE #( module TRELLIS_SLICE #(
parameter MODE = "LOGIC", parameter MODE = "LOGIC",
parameter GSR = "ENABLED", parameter GSR = "ENABLED",
parameter SRMODE = "LSR_OVER_CE", parameter SRMODE = "LSR_OVER_CE",
@ -139,33 +139,34 @@ module FACADE_SLICE #(
endgenerate endgenerate
/* Reg can be fed either by M, or DI inputs; DI inputs muxes OFX and F /* Reg can be fed either by M, or DI inputs; DI inputs muxes OFX and F
outputs (in other words, feeds back into FACADE_SLICE). */ outputs (in other words, feeds back into TRELLIS_SLICE). */
wire di0 = (REG0_SD == "1") ? DI0 : M0; wire di0 = (REG0_SD == "1") ? DI0 : M0;
wire di1 = (REG1_SD == "1") ? DI1 : M1; wire di1 = (REG1_SD == "1") ? DI1 : M1;
FACADE_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX), TRELLIS_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX),
.LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG0_REGSET), .LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG0_REGSET),
.REGMODE(REGMODE)) REG_0 (.CLK(CLK), .DI(di0), .LSR(LSR), .CE(CE), .Q(Q0)); .REGMODE(REGMODE)) REG_0 (.CLK(CLK), .DI(di0), .LSR(LSR), .CE(CE), .Q(Q0));
FACADE_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX), TRELLIS_FF#(.GSR(GSR), .CEMUX(CEMUX), .CLKMUX(CLKMUX), .LSRMUX(LSRMUX),
.LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG1_REGSET), .LSRONMUX(LSRONMUX), .SRMODE(SRMODE), .REGSET(REG1_REGSET),
.REGMODE(REGMODE)) REG_1 (.CLK(CLK), .DI(di1), .LSR(LSR), .CE(CE), .Q(Q1)); .REGMODE(REGMODE)) REG_1 (.CLK(CLK), .DI(di1), .LSR(LSR), .CE(CE), .Q(Q1));
endmodule endmodule
module FACADE_IO #( module TRELLIS_IO #(
parameter DIR = "INPUT" parameter DIR = "INPUT"
) ( ) (
inout PAD, (* iopad_external_pin *)
inout B,
input I, T, input I, T,
output O output O
); );
generate generate
if (DIR == "INPUT") begin if (DIR == "INPUT") begin
assign O = PAD; assign O = B;
end else if (DIR == "OUTPUT") begin end else if (DIR == "OUTPUT") begin
assign PAD = T ? 1'bz : I; assign B = T ? 1'bz : I;
end else if (DIR == "BIDIR") begin end else if (DIR == "BIDIR") begin
assign PAD = T ? 1'bz : I; assign B = T ? 1'bz : I;
assign O = PAD; assign O = B;
end else begin end else begin
ERROR_UNKNOWN_IO_MODE error(); ERROR_UNKNOWN_IO_MODE error();
end end
@ -320,14 +321,8 @@ module DP8KC(
parameter INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000"; parameter INITVAL_1F = "0x00000000000000000000000000000000000000000000000000000000000000000000000000000000";
endmodule endmodule
// IO- "$__" cells for the iopadmap pass. These are temporary cells not meant `ifndef NO_INCLUDES
// to be instantiated by the end user. They are required in this file for
// attrmvcp to work. `include "cells_io.vh"
(* blackbox *)
module \$__FACADE_OUTPAD (input I, output O); endmodule `endif
(* blackbox *)
module \$__FACADE_INPAD (input I, output O); endmodule
(* blackbox *)
module \$__FACADE_TOUTPAD (input I, T, output O); endmodule
(* blackbox *)
module \$__FACADE_TINOUTPAD (input I, T, output O, inout B); endmodule

View File

@ -214,9 +214,9 @@ struct SynthMachXO2Pass : public ScriptPass
{ {
if (!noiopad || help_mode) if (!noiopad || help_mode)
{ {
run("iopadmap -bits -outpad $__FACADE_OUTPAD I:O -inpad $__FACADE_INPAD O:I -toutpad $__FACADE_TOUTPAD ~T:I:O -tinoutpad $__FACADE_TINOUTPAD ~T:O:I:B A:top"); run("iopadmap -bits -outpad OB I:O -inpad IB O:I -toutpad OBZ ~T:I:O -tinoutpad BB ~T:O:I:B A:top", "(only if '-iopad')");
run("attrmvcp -attr src -attr LOC t:$__FACADE_OUTPAD %x:+[O] t:$__FACADE_TOUTPAD %x:+[O] t:$__FACADE_TINOUTPAD %x:+[B]"); run("attrmvcp -attr src -attr LOC t:OB %x:+[O] t:OBZ %x:+[O] t:BB %x:+[B]");
run("attrmvcp -attr src -attr LOC -driven t:$__FACADE_INPAD %x:+[I]"); run("attrmvcp -attr src -attr LOC -driven t:IB %x:+[I]");
} }
} }