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Add setundef -anyseq / -anyconst support to -undriven mode 

Signed-off-by: Clifford Wolf <clifford@clifford.at>
This commit is contained in:
Clifford Wolf 2018-06-01 11:57:28 +02:00
parent 4cd6d5556a
commit f273291dfe
1 changed files with 11 additions and 3 deletions
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14
passes/cmds/setundef.cc
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@ -176,7 +176,10 @@ struct SetundefPass : public Pass {
extra_args(args, argidx, design); extra_args(args, argidx, design);
if (!got_value) if (!got_value)
log_cmd_error("One of the options -zero, -one, -anyseq, or -random <seed> must be specified.\n"); log_cmd_error("One of the options -zero, -one, -anyseq, -anyconst, or -random <seed> must be specified.\n");
if (init_mode && (worker.next_bit_mode == MODE_ANYSEQ || worker.next_bit_mode == MODE_ANYCONST))
log_cmd_error("The options -init and -anyseq / -anyconst are exclusive.\n");
for (auto module : design->selected_modules()) for (auto module : design->selected_modules())
{ {
@ -204,8 +207,13 @@ struct SetundefPass : public Pass {
RTLIL::SigSpec sig = undriven_signals.export_all(); RTLIL::SigSpec sig = undriven_signals.export_all();
for (auto &c : sig.chunks()) { for (auto &c : sig.chunks()) {
RTLIL::SigSpec bits; RTLIL::SigSpec bits;
for (int i = 0; i < c.width; i++) if (worker.next_bit_mode == MODE_ANYSEQ)
bits.append(worker.next_bit()); bits = module->Anyseq(NEW_ID, c.width);
else if (worker.next_bit_mode == MODE_ANYCONST)
bits = module->Anyconst(NEW_ID, c.width);
else
for (int i = 0; i < c.width; i++)
bits.append(worker.next_bit());
module->connect(RTLIL::SigSig(c, bits)); module->connect(RTLIL::SigSig(c, bits));
} }
} }