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Merge pull request #3962 from jix/sim-noinitstate

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Jannis Harder 2023-10-02 16:57:46 +02:00 committed by GitHub
parent b894abf8b1 7eaa4bcb46
commit ecf09b9271
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1 changed files with 14 additions and 1 deletions
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15
passes/sat/sim.cc
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@ -111,6 +111,7 @@ struct SimShared
int step = 0; int step = 0;
std::vector<TriggeredAssertion> triggered_assertions; std::vector<TriggeredAssertion> triggered_assertions;
bool serious_asserts = false; bool serious_asserts = false;
bool initstate = true;
}; };
void zinit(State &v) void zinit(State &v)
@ -1356,6 +1357,8 @@ struct SimWorker : SimShared
set_inports(clock, State::Sx); set_inports(clock, State::Sx);
set_inports(clockn, State::Sx); set_inports(clockn, State::Sx);
top->set_initstate_outputs(initstate ? State::S1 : State::S0);
update(false); update(false);
register_output_step(0); register_output_step(0);
@ -1372,6 +1375,9 @@ struct SimWorker : SimShared
update(true); update(true);
register_output_step(10*cycle + 5); register_output_step(10*cycle + 5);
if (cycle == 0)
top->set_initstate_outputs(State::S0);
if (debug) if (debug)
log("\n===== %d =====\n", 10*cycle + 10); log("\n===== %d =====\n", 10*cycle + 10);
else if (verbose) else if (verbose)
@ -1953,7 +1959,7 @@ struct SimWorker : SimShared
if (yw.steps.empty()) { if (yw.steps.empty()) {
log_warning("Yosys witness file `%s` contains no time steps\n", yw.filename.c_str()); log_warning("Yosys witness file `%s` contains no time steps\n", yw.filename.c_str());
} else { } else {
top->set_initstate_outputs(State::S1); top->set_initstate_outputs(initstate ? State::S1 : State::S0);
set_yw_state(yw, hierarchy, 0); set_yw_state(yw, hierarchy, 0);
set_yw_clocks(yw, hierarchy, true); set_yw_clocks(yw, hierarchy, true);
initialize_stable_past(); initialize_stable_past();
@ -2546,6 +2552,9 @@ struct SimPass : public Pass {
log(" -n <integer>\n"); log(" -n <integer>\n");
log(" number of clock cycles to simulate (default: 20)\n"); log(" number of clock cycles to simulate (default: 20)\n");
log("\n"); log("\n");
log(" -noinitstate\n");
log(" do not activate $initstate cells during the first cycle\n");
log("\n");
log(" -a\n"); log(" -a\n");
log(" use all nets in VCD/FST operations, not just those with public names\n"); log(" use all nets in VCD/FST operations, not just those with public names\n");
log("\n"); log("\n");
@ -2646,6 +2655,10 @@ struct SimPass : public Pass {
worker.cycles_set = true; worker.cycles_set = true;
continue; continue;
} }
if (args[argidx] == "-noinitstate") {
worker.initstate = false;
continue;
}
if (args[argidx] == "-rstlen" && argidx+1 < args.size()) { if (args[argidx] == "-rstlen" && argidx+1 < args.size()) {
worker.rstlen = atoi(args[++argidx].c_str()); worker.rstlen = atoi(args[++argidx].c_str());
continue; continue;