mirror of https://github.com/YosysHQ/yosys.git
Fix constant args used with function ports split across declarations
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@ -3211,14 +3211,15 @@ skip_dynamic_range_lvalue_expansion:;
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if (wire_cache.count(child->str))
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if (wire_cache.count(child->str))
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{
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{
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wire = wire_cache.at(child->str);
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wire = wire_cache.at(child->str);
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if (wire->children.empty()) {
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bool contains_value = wire->type == AST_LOCALPARAM;
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if (wire->children.size() == contains_value) {
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for (auto c : child->children)
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for (auto c : child->children)
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wire->children.push_back(c->clone());
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wire->children.push_back(c->clone());
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} else if (!child->children.empty()) {
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} else if (!child->children.empty()) {
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while (child->simplify(true, false, false, stage, -1, false, false)) { }
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while (child->simplify(true, false, false, stage, -1, false, false)) { }
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if (GetSize(child->children) == GetSize(wire->children)) {
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if (GetSize(child->children) == GetSize(wire->children) - contains_value) {
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for (int i = 0; i < GetSize(child->children); i++)
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for (int i = 0; i < GetSize(child->children); i++)
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if (*child->children.at(i) != *wire->children.at(i))
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if (*child->children.at(i) != *wire->children.at(i + contains_value))
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goto tcall_incompatible_wires;
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goto tcall_incompatible_wires;
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} else {
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} else {
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tcall_incompatible_wires:
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tcall_incompatible_wires:
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@ -23,6 +23,22 @@ module top;
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end
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end
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endfunction
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endfunction
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function automatic [31:0] operation3;
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input [4:0] rounds;
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input integer num;
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reg [4:0] rounds;
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integer i;
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begin
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begin : shadow
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integer rounds;
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rounds = 0;
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end
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for (i = 0; i < rounds; i = i + 1)
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num = num * 2;
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operation3 = num;
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end
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endfunction
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wire [31:0] a;
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wire [31:0] a;
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assign a = 2;
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assign a = 2;
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@ -34,11 +50,15 @@ module top;
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wire [31:0] x2;
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wire [31:0] x2;
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assign x2 = operation2(A, a);
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assign x2 = operation2(A, a);
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wire [31:0] x3;
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assign x3 = operation3(A, a);
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// `define VERIFY
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// `define VERIFY
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`ifdef VERIFY
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`ifdef VERIFY
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assert property (a == 2);
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assert property (a == 2);
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assert property (A == 3);
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assert property (A == 3);
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assert property (x1 == 16);
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assert property (x1 == 16);
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assert property (x2 == 4);
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assert property (x2 == 4);
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assert property (x3 == 16);
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`endif
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`endif
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endmodule
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endmodule
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