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Adding a note (TODO) in the memory_params.ys check file

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Diego H 2019-12-12 16:06:46 -06:00
parent 937ec1ee78
commit e33f407655
1 changed files with 2 additions and 0 deletions
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tests/arch/xilinx/memory_params.ys
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@ -1,3 +1,5 @@
## TODO: Not running equivalence checking because BRAM models does not exists
## currently. Checking instance counts instead.
# Memory bits <= 18K; Data width <= 36; Address width <= 14: -> RAMB18E1
read_verilog ../common/memory_params.v
chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 1 sync_ram_sdp