mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #1139 from YosysHQ/dave/check-sim-iverilog
tests: Check that Icarus can parse arch sim models
This commit is contained in:
commit
c4c39e9814
1
Makefile
1
Makefile
|
@ -681,6 +681,7 @@ test: $(TARGETS) $(EXTRA_TARGETS)
|
|||
+cd tests/svinterfaces && bash run-test.sh $(SEEDOPT)
|
||||
+cd tests/opt && bash run-test.sh
|
||||
+cd tests/aiger && bash run-test.sh
|
||||
+cd tests/arch && bash run-test.sh
|
||||
@echo ""
|
||||
@echo " Passed \"make test\"."
|
||||
@echo ""
|
||||
|
|
|
@ -0,0 +1,18 @@
|
|||
#!/bin/bash
|
||||
|
||||
set -e
|
||||
|
||||
echo "Running syntax check on arch sim models"
|
||||
for arch in ../../techlibs/*; do
|
||||
find $arch -name cells_sim.v | while read path; do
|
||||
echo -n "Test $path ->"
|
||||
iverilog -t null -I$arch $path
|
||||
echo " ok"
|
||||
done
|
||||
done
|
||||
|
||||
for path in "../../techlibs/common/simcells.v" "../../techlibs/common/simlib.v"; do
|
||||
echo -n "Test $path ->"
|
||||
iverilog -t null $path
|
||||
echo " ok"
|
||||
done
|
Loading…
Reference in New Issue