mirror of https://github.com/YosysHQ/yosys.git
abc9: cleanup
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@ -362,7 +362,7 @@ struct Abc9ExePass : public Pass {
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}
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}
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
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{
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{
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log_header(design, "Executing ABC9_MAP pass (technology mapping using ABC9).\n");
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log_header(design, "Executing ABC9_EXE pass (technology mapping using ABC9).\n");
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#ifdef ABCEXTERNAL
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#ifdef ABCEXTERNAL
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std::string exe_file = ABCEXTERNAL;
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std::string exe_file = ABCEXTERNAL;
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@ -215,11 +215,11 @@ module FDCE (output Q, (* techmap_autopurge *) input C, CE, D, CLR);
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.IS_PRE_INVERTED(IS_CLR_INVERTED)
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.IS_PRE_INVERTED(IS_CLR_INVERTED)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(~D), .Q($Q), .C(C), .CE(CE), .PRE(CLR)
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.D(~D), .Q($Q), .C(C), .CE(CE), .PRE(CLR)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC1 below
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// $__ABC9_ASYNC1 below
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);
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);
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// Since this is an async flop, async behaviour is dealt with here
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// Since this is an async flop, async behaviour is dealt with here
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
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@ -233,11 +233,11 @@ module FDCE (output Q, (* techmap_autopurge *) input C, CE, D, CLR);
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.IS_CLR_INVERTED(IS_CLR_INVERTED)
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.IS_CLR_INVERTED(IS_CLR_INVERTED)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(D), .Q($Q), .C(C), .CE(CE), .CLR(CLR)
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.D(D), .Q($Q), .C(C), .CE(CE), .CLR(CLR)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC0 below
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// $__ABC9_ASYNC0 below
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);
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);
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// Since this is an async flop, async behaviour is dealt with here
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// Since this is an async flop, async behaviour is dealt with here
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(CLR ^ IS_CLR_INVERTED), .Y(QQ));
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@ -258,11 +258,11 @@ module FDCE_1 (output Q, (* techmap_autopurge *) input C, CE, D, CLR);
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.INIT(1'b0)
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.INIT(1'b0)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(~D), .Q($Q), .C(C), .CE(CE), .PRE(CLR)
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.D(~D), .Q($Q), .C(C), .CE(CE), .PRE(CLR)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC1 below
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// $__ABC9_ASYNC1 below
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);
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);
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(CLR), .Y(QQ));
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(CLR), .Y(QQ));
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end
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end
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@ -272,11 +272,11 @@ module FDCE_1 (output Q, (* techmap_autopurge *) input C, CE, D, CLR);
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.INIT(1'b0)
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.INIT(1'b0)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(D), .Q($Q), .C(C), .CE(CE), .CLR(CLR)
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.D(D), .Q($Q), .C(C), .CE(CE), .CLR(CLR)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC0 below
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// $__ABC9_ASYNC0 below
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);
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);
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(CLR), .Y(QQ));
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(CLR), .Y(QQ));
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end endgenerate
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end endgenerate
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@ -303,11 +303,11 @@ module FDPE (output Q, (* techmap_autopurge *) input C, CE, D, PRE);
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.IS_CLR_INVERTED(IS_PRE_INVERTED),
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.IS_CLR_INVERTED(IS_PRE_INVERTED),
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(~D), .Q($Q), .C(C), .CE(CE), .CLR(PRE)
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.D(~D), .Q($Q), .C(C), .CE(CE), .CLR(PRE)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC0 below
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// $__ABC9_ASYNC0 below
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);
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);
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(PRE ^ IS_PRE_INVERTED), .Y(QQ));
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(PRE ^ IS_PRE_INVERTED), .Y(QQ));
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end
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end
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@ -320,11 +320,11 @@ module FDPE (output Q, (* techmap_autopurge *) input C, CE, D, PRE);
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.IS_PRE_INVERTED(IS_PRE_INVERTED),
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.IS_PRE_INVERTED(IS_PRE_INVERTED),
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(D), .Q($Q), .C(C), .CE(CE), .PRE(PRE)
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.D(D), .Q($Q), .C(C), .CE(CE), .PRE(PRE)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC1 below
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// $__ABC9_ASYNC1 below
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);
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);
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(PRE ^ IS_PRE_INVERTED), .Y(QQ));
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(PRE ^ IS_PRE_INVERTED), .Y(QQ));
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end endgenerate
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end endgenerate
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@ -344,11 +344,11 @@ module FDPE_1 (output Q, (* techmap_autopurge *) input C, CE, D, PRE);
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.INIT(1'b0)
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.INIT(1'b0)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(~D), .Q($Q), .C(C), .CE(CE), .CLR(PRE)
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.D(~D), .Q($Q), .C(C), .CE(CE), .CLR(PRE)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC0 below
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// $__ABC9_ASYNC0 below
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);
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);
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(PRE), .Y(QQ));
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$__ABC9_ASYNC0 abc_async (.A($QQ), .S(PRE), .Y(QQ));
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end
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end
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@ -358,11 +358,11 @@ module FDPE_1 (output Q, (* techmap_autopurge *) input C, CE, D, PRE);
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.INIT(1'b0)
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.INIT(1'b0)
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) _TECHMAP_REPLACE_ (
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) _TECHMAP_REPLACE_ (
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.D(D), .Q($Q), .C(C), .CE(CE), .PRE(PRE)
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.D(D), .Q($Q), .C(C), .CE(CE), .PRE(PRE)
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// ^^^ Note that async
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// ^^^ Note that async
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// control is not directly
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// control is not directly
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// supported by abc9 but its
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// supported by abc9 but its
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// behaviour is captured by
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// behaviour is captured by
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// $__ABC9_ASYNC1 below
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// $__ABC9_ASYNC1 below
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);
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);
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(PRE), .Y(QQ));
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$__ABC9_ASYNC1 abc_async (.A($QQ), .S(PRE), .Y(QQ));
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end endgenerate
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end endgenerate
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