mirror of https://github.com/YosysHQ/yosys.git
Merge pull request #1794 from YosysHQ/dave/mince-abc9-fix
ice40: Map unmapped 'mince' DFFs to gate level
This commit is contained in:
commit
beab15b77c
|
@ -345,6 +345,7 @@ struct SynthIce40Pass : public ScriptPass
|
|||
if (min_ce_use >= 0) {
|
||||
run("opt_merge");
|
||||
run(stringf("dff2dffe -unmap-mince %d", min_ce_use));
|
||||
run("simplemap t:$dff");
|
||||
}
|
||||
run("techmap -D NO_LUT -D NO_ADDER -map +/ice40/cells_map.v");
|
||||
run("opt_expr -mux_undef");
|
||||
|
|
|
@ -0,0 +1,17 @@
|
|||
read_verilog <<EOT
|
||||
|
||||
module top(input clk, ce, input [2:0] a, b, output reg [2:0] q);
|
||||
|
||||
reg [2:0] aa, bb;
|
||||
|
||||
always @(posedge clk) begin
|
||||
if (ce) begin
|
||||
aa <= a;
|
||||
end
|
||||
bb <= b;
|
||||
q <= aa + bb;
|
||||
end
|
||||
endmodule
|
||||
EOT
|
||||
|
||||
synth_ice40 -abc9 -dffe_min_ce_use 4
|
Loading…
Reference in New Issue