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clockgate: 1-bit const 0

This commit is contained in:
Emil J. Tywoniak 2024-09-16 13:58:27 +02:00
parent a8a92d3469
commit be7c93ec6d
1 changed files with 1 additions and 1 deletions
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2
passes/techmap/clockgate.cc
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@ -187,7 +187,7 @@ struct ClockgatePass : public Pass {
icg->setPort(matching_icg_desc->clk_out_pin, gclk.new_net); icg->setPort(matching_icg_desc->clk_out_pin, gclk.new_net);
// Tie low DFT ports like scan chain enable // Tie low DFT ports like scan chain enable
for (auto port : tie_lo_ports) for (auto port : tie_lo_ports)
icg->setPort(port, Const(0)); icg->setPort(port, Const(0, 1));
// Fix CE polarity if needed // Fix CE polarity if needed
if (!clk.pol_ce) { if (!clk.pol_ce) {
SigBit ce_fixed_pol = module->NotGate(NEW_ID, clk.ce_bit); SigBit ce_fixed_pol = module->NotGate(NEW_ID, clk.ce_bit);