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Correcting plurals
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@ -134,12 +134,12 @@ when the individual bits of of a signal vector are accessed.
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The key elements in understanding this circuit diagram are of course the boxes
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with round corners and rows labeled ``<MSB_LEFT>:<LSB_LEFT> -
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<MSB_RIGHT>:<LSB_RIGHT>``. Each of this boxes has one signal per row on one side
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and a common signal for all rows on the other side. The ``<MSB>:<LSB>`` tuples
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specify which bits of the signals are broken out and connected. So the top row
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of the box connecting the signals ``a`` and ``x`` indicates that the bit 0 (i.e.
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the range 0:0) from signal ``a`` is connected to bit 1 (i.e. the range 1:1) of
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signal ``x``.
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<MSB_RIGHT>:<LSB_RIGHT>``. Each of these boxes have one signal per row on one
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side and a common signal for all rows on the other side. The ``<MSB>:<LSB>``
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tuples specify which bits of the signals are broken out and connected. So the
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top row of the box connecting the signals ``a`` and ``x`` indicates that the bit
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0 (i.e. the range 0:0) from signal ``a`` is connected to bit 1 (i.e. the range
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1:1) of signal ``x``.
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Lines connecting such boxes together and lines connecting such boxes to cell
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ports have a slightly different look to emphasise that they are not actual
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@ -213,11 +213,11 @@ the ``pdf`` and ``ps`` format are the only formats that support plotting
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multiple modules in one run.
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In densely connected circuits it is sometimes hard to keep track of the
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individual signal wires. For this cases it can be useful to call :cmd:ref:`show`
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with the ``-colors <integer>`` argument, which randomly assigns colors to the
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nets. The integer (> 0) is used as seed value for the random color assignments.
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Sometimes it is necessary it try some values to find an assignment of colors
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that looks good.
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individual signal wires. For these cases it can be useful to call
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:cmd:ref:`show` with the ``-colors <integer>`` argument, which randomly assigns
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colors to the nets. The integer (> 0) is used as seed value for the random color
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assignments. Sometimes it is necessary it try some values to find an assignment
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of colors that looks good.
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The command ``help show`` prints a complete listing of all options supported by
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the :cmd:ref:`show` command.
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@ -531,7 +531,7 @@ Note that the :cmd:ref:`eval` command (as well as the :cmd:ref:`sat` command
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discussed in the next sections) does only operate on flattened modules. It can
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not analyze signals that are passed through design hierarchy levels. So the
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:cmd:ref:`flatten` command must be used on modules that instantiate other
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modules before this commands can be applied.
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modules before these commands can be applied.
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Solving combinatorial SAT problems
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -187,7 +187,7 @@ all cells and signals that are used to generate the signal ``sum``. The ``%ci``
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action can be used to select the input cones of all object in the top selection
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in the stack maintained by the :cmd:ref:`select` command.
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As with the ``%x`` action, this commands broadens the selection by one "step".
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As with the ``%x`` action, these commands broaden the selection by one "step".
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But this time the operation only works against the direction of data flow. That
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means, wires only select cells via output ports and cells only select wires via
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input ports.
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@ -329,7 +329,7 @@ Similar to ``%ci`` exists an action ``%co`` to select output cones that accepts
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the same syntax for pattern and repetition. The ``%x`` action mentioned
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previously also accepts this advanced syntax.
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This actions for traversing the circuit graph, combined with the actions for
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These actions for traversing the circuit graph, combined with the actions for
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boolean operations such as intersection (``%i``) and difference (``%d``) are
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powerful tools for extracting the relevant portions of the circuit under
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investigation.
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@ -4,7 +4,7 @@ Internal flow
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A (usually short) synthesis script controls Yosys.
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This scripts contain three types of commands:
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These scripts contain three types of commands:
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- **Frontends**, that read input files (usually Verilog);
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- **Passes**, that perform transformations on the design in memory;
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@ -279,9 +279,9 @@ Notes on using techmap
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~~~~~~~~~~~~~~~~~~~~~~
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- Don't use positional cell parameters in map modules.
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- You can use the ``$__``-prefix for internal cell types to avoid
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collisions with the user-namespace. But always use two underscores or the
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internal consistency checker will trigger on this cells.
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- You can use the ``$__``-prefix for internal cell types to avoid collisions
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with the user-namespace. But always use two underscores or the internal
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consistency checker will trigger on these cells.
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- Techmap has two major use cases:
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- Creating good logic-level representation of arithmetic functions. This
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