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Merge branch 'eddie/fix_mem2reg' into eddie/xilinx_srl

This commit is contained in:
Eddie Hung 2019-08-21 13:37:45 -07:00
parent 5ce0c31d0e a6776ee35e
commit b808123e71
2 changed files with 17 additions and 0 deletions
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4
frontends/ast/simplify.cc
View File

@ -150,6 +150,10 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage,
reg->str = stringf("%s[%d]", node->str.c_str(), i);
reg->is_reg = true;
reg->is_signed = node->is_signed;
for (auto &it : node->attributes)
reg->attributes.emplace(it.first, it.second->clone());
reg->filename = node->filename;
reg->linenum = node->linenum;
children.push_back(reg);
while (reg->simplify(true, false, false, 1, -1, false, false)) { }
}

13
tests/various/mem2reg.ys Normal file
View File

@ -0,0 +1,13 @@
read_verilog <<EOT
module top;
parameter DATADEPTH=2;
parameter DATAWIDTH=1;
(* keep, nomem2reg *) reg [DATAWIDTH-1:0] data1 [DATADEPTH-1:0];
(* keep, mem2reg *) reg [DATAWIDTH-1:0] data2 [DATADEPTH-1:0];
endmodule
EOT
proc
cd top
select -assert-count 1 m:data1 a:src=<<EOT:4 %i
select -assert-count 2 w:data2[*] a:src=<<EOT:5 %i