riscv
/
yosys
mirror of https://github.com/YosysHQ/yosys.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

abc9_ops: optimise to not derive unless attribute exists

This commit is contained in:
Eddie Hung 2020-05-29 17:33:10 -07:00
parent d3b53bc495
commit b17e8495b8
1 changed files with 8 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
passes/techmap/abc9_ops.cc
View File

@ -102,8 +102,6 @@ void check(RTLIL::Design *design, bool dff_mode)
auto inst_module = design->module(cell->type); auto inst_module = design->module(cell->type);
if (!inst_module) if (!inst_module)
continue; continue;
if (!inst_module->get_blackbox_attribute())
continue;
IdString derived_type; IdString derived_type;
Module *derived_module; Module *derived_module;
if (cell->parameters.empty()) { if (cell->parameters.empty()) {
@ -111,6 +109,10 @@ void check(RTLIL::Design *design, bool dff_mode)
derived_module = inst_module; derived_module = inst_module;
} }
else { else {
// Check potential (since its value may depend on a parameter,
// but not its existence)
if (!inst_module->has_attribute(ID::abc9_flop))
continue;
derived_type = inst_module->derive(design, cell->parameters); derived_type = inst_module->derive(design, cell->parameters);
derived_module = design->module(derived_type); derived_module = design->module(derived_type);
log_assert(derived_module); log_assert(derived_module);
@ -173,8 +175,6 @@ void prep_hier(RTLIL::Design *design, bool dff_mode)
auto inst_module = design->module(cell->type); auto inst_module = design->module(cell->type);
if (!inst_module) if (!inst_module)
continue; continue;
if (!inst_module->get_blackbox_attribute())
continue;
IdString derived_type; IdString derived_type;
Module *derived_module; Module *derived_module;
if (cell->parameters.empty()) { if (cell->parameters.empty()) {
@ -182,6 +182,10 @@ void prep_hier(RTLIL::Design *design, bool dff_mode)
derived_module = inst_module; derived_module = inst_module;
} }
else { else {
// Check potential for any one of those three
// (since its value may depend on a parameter, but not its existence)
if (!inst_module->has_attribute(ID::abc9_flop) && !inst_module->has_attribute(ID::abc9_box) && !inst_module->get_bool_attribute(ID::abc9_bypass))
continue;
derived_type = inst_module->derive(design, cell->parameters); derived_type = inst_module->derive(design, cell->parameters);
derived_module = design->module(derived_type); derived_module = design->module(derived_type);
} }