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cxxrtl: Add support for memory read port reset.

This commit is contained in:
Marcelina Kościelnicka 2021-07-10 23:47:01 +02:00
parent be5cf29699
commit af7fa62251
1 changed files with 41 additions and 1 deletions
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42
backends/cxxrtl/cxxrtl_backend.cc
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@ -1600,7 +1600,29 @@ struct CxxrtlWorker {
f << " = value<" << mem->width << "> {};\n";
dec_indent();
f << indent << "}\n";
if (has_enable) {
if (has_enable && !port.ce_over_srst) {
dec_indent();
f << indent << "}\n";
}
if (port.srst != State::S0) {
// Synchronous reset
std::vector<const RTLIL::Cell*> inlined_cells_srst;
collect_sigspec_rhs(port.srst, for_debug, inlined_cells_srst);
if (!inlined_cells_srst.empty())
dump_inlined_cells(inlined_cells_srst);
f << indent << "if (";
dump_sigspec_rhs(port.srst);
f << " == value<1> {1u}) {\n";
inc_indent();
f << indent;
dump_sigspec_lhs(port.data);
f << " = ";
dump_const(port.srst_value);
f << ";\n";
dec_indent();
f << indent << "}\n";
}
if (has_enable && port.ce_over_srst) {
dec_indent();
f << indent << "}\n";
}
@ -1608,6 +1630,24 @@ struct CxxrtlWorker {
dec_indent();
f << indent << "}\n";
}
if (port.arst != State::S0) {
// Asynchronous reset
std::vector<const RTLIL::Cell*> inlined_cells_arst;
collect_sigspec_rhs(port.arst, for_debug, inlined_cells_arst);
if (!inlined_cells_arst.empty())
dump_inlined_cells(inlined_cells_arst);
f << indent << "if (";
dump_sigspec_rhs(port.arst);
f << " == value<1> {1u}) {\n";
inc_indent();
f << indent;
dump_sigspec_lhs(port.data);
f << " = ";
dump_const(port.arst_value);
f << ";\n";
dec_indent();
f << indent << "}\n";
}
}
void dump_mem_wrports(const Mem *mem, bool for_debug = false)