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st.ffP from if to assert
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@ -59,7 +59,8 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
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log(" adder %s (%s)\n", log_id(st.postAdd), log_id(st.postAdd->type));
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SigSpec &opmode = cell->connections_.at("\\OPMODE");
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if (st.ffP && st.postAddMux) {
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if (st.postAddMux) {
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log_assert(st.ffP);
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opmode[4] = st.postAddMux->getPort("\\S");
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pm.autoremove(st.postAddMux);
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}
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