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Another typo

This commit is contained in:
Eddie Hung 2019-07-10 19:59:24 -07:00
parent ad35b509de
commit 7899a06ed6
1 changed files with 1 additions and 1 deletions
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2
techlibs/xilinx/abc_ff.v
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@ -94,7 +94,7 @@ module FDPE (output reg Q, input C, CE, D, PRE);
parameter [0:0] IS_D_INVERTED = 1'b0;
parameter [0:0] IS_PRE_INVERTED = 1'b0;
wire \$nextQ , \$currQ ;
\$__ABC_FDCE #(
\$__ABC_FDPE #(
.INIT(|0),
.IS_C_INVERTED(IS_C_INVERTED),
.IS_D_INVERTED(IS_D_INVERTED),