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Renamed VOUT to OUT on GP_ACMP cell

This commit is contained in:
Andrew Zonenberg 2016-04-23 22:53:49 -07:00
parent 512486dcf3
commit 6e215f374d
1 changed files with 3 additions and 1 deletions
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4
techlibs/greenpak4/cells_sim.v
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@ -13,7 +13,7 @@ module GP_4LUT(input IN0, IN1, IN2, IN3, output OUT);
assign OUT = INIT[{IN3, IN2, IN1, IN0}];
endmodule
module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg VOUT = 0);
module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT);
parameter BANDWIDTH = "HIGH";
parameter VIN_BUF_EN = 0;
@ -21,6 +21,8 @@ module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg VOU
parameter VIN_ISRC_EN = 0;
parameter HYSTERESIS = 0;
initial OUT = 0;
//cannot simulate mixed signal IP
endmodule