mirror of https://github.com/YosysHQ/yosys.git
Respect \keep on cells or wires
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@ -10,6 +10,8 @@ endcode
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match first
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select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
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select !first->get_bool_attribute(\keep)
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select !port(first, \Q).as_wire()->get_bool_attribute(\keep)
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filter !non_first_cells.count(first)
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//generate
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// SigSpec A = module->addWire(NEW_ID);
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@ -46,11 +48,15 @@ subpattern setup
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match first
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select first->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
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select !first->get_bool_attribute(\keep)
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select !port(first, \Q).as_wire()->get_bool_attribute(\keep)
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endmatch
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match next
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select nusers(port(next, \Q)) == 2
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select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
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select !next->get_bool_attribute(\keep)
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select !port(next, \Q).as_wire()->get_bool_attribute(\keep)
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select nusers(port(next, \Q)) == 2
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index <IdString> next->type === first->type
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index <SigSpec> port(next, \Q) === port(first, \D)
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endmatch
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@ -66,8 +72,10 @@ arg first
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match next
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semioptional
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select nusers(port(next, \Q)) == 2
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select next->type.in($_DFF_N_, $_DFF_P_, $_DFFE_NN_, $_DFFE_NP_, $_DFFE_PN_, $_DFFE_PP_, \FDRE, \FDRE_1)
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select !next->get_bool_attribute(\keep)
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select !port(next, \Q).as_wire()->get_bool_attribute(\keep)
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select nusers(port(next, \Q)) == 2
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index <IdString> next->type === chain.back()->type
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index <SigSpec> port(next, \Q) === port(chain.back(), \D)
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//generate 10
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