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Fix spelling

This commit is contained in:
Eddie Hung 2019-05-30 15:50:47 -07:00
parent 1ad33c3b5a
commit 4a6b9af227
1 changed files with 1 additions and 1 deletions
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2
passes/techmap/abc9.cc
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@ -924,7 +924,7 @@ void abc9_module(RTLIL::Design *design, RTLIL::Module *current_module, std::stri
else {
// Attempt another wideports_split here because there
// exists the possibility that different bits of a port
// could be an input and output, therefore parse_xiager()
// could be an input and output, therefore parse_xaiger()
// could not combine it into a wideport
auto r = wideports_split(w->name.str());
wire = module->wire(r.first);