mirror of https://github.com/YosysHQ/yosys.git
Forgot to set ud_variable.minlen
This commit is contained in:
parent
61639d5387
commit
231ddbf95c
|
@ -204,6 +204,7 @@ struct XilinxSrlPass : public Pass {
|
|||
for (auto module : design->selected_modules()) {
|
||||
auto pm = xilinx_srl_pm(module, module->selected_cells());
|
||||
pm.ud_fixed.minlen = minlen;
|
||||
pm.ud_variable.minlen = minlen;
|
||||
|
||||
if (fixed) {
|
||||
// TODO: How to get these automatically?
|
||||
|
|
Loading…
Reference in New Issue