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Merge remote-tracking branch 'origin/master' into xaig_dff

This commit is contained in:
Eddie Hung 2020-01-06 09:31:28 -08:00
parent ffd38cb5ea 2e0da68528
commit 19541640ee
19 changed files with 69 additions and 40 deletions
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6
techlibs/anlogic/Makefile.inc
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@ -7,6 +7,6 @@ $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams.txt)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams.txt))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams_map.v))
$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/dram_init_16x4.vh)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutram_init_16x4.vh))

0
techlibs/anlogic/dram_init_16x4.vh → techlibs/anlogic/lutram_init_16x4.vh
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0
techlibs/anlogic/drams.txt → techlibs/anlogic/lutrams.txt
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2
techlibs/anlogic/drams_map.v → techlibs/anlogic/lutrams_map.v
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@ -10,7 +10,7 @@ module \$__ANLOGIC_DRAM16X4 (CLK1, A1ADDR, A1DATA, B1ADDR, B1DATA, B1EN);
input B1EN; input B1EN;
EG_LOGIC_DRAM16X4 #( EG_LOGIC_DRAM16X4 #(
`include "dram_init_16x4.vh" `include "lutram_init_16x4.vh"
) _TECHMAP_REPLACE_ ( ) _TECHMAP_REPLACE_ (
.di(B1DATA), .di(B1DATA),
.waddr(B1ADDR), .waddr(B1ADDR),

24
techlibs/anlogic/synth_anlogic.cc
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@ -60,6 +60,9 @@ struct SynthAnlogicPass : public ScriptPass
log(" -retime\n"); log(" -retime\n");
log(" run 'abc' with '-dff -D 1' options\n"); log(" run 'abc' with '-dff -D 1' options\n");
log("\n"); log("\n");
log(" -nolutram\n");
log(" do not use EG_LOGIC_DRAM16X4 cells in output netlist\n");
log("\n");
log("\n"); log("\n");
log("The following commands are executed by this synthesis command:\n"); log("The following commands are executed by this synthesis command:\n");
help_script(); help_script();
@ -67,7 +70,7 @@ struct SynthAnlogicPass : public ScriptPass
} }
string top_opt, edif_file, json_file; string top_opt, edif_file, json_file;
bool flatten, retime; bool flatten, retime, nolutram;
void clear_flags() YS_OVERRIDE void clear_flags() YS_OVERRIDE
{ {
@ -76,6 +79,7 @@ struct SynthAnlogicPass : public ScriptPass
json_file = ""; json_file = "";
flatten = true; flatten = true;
retime = false; retime = false;
nolutram = false;
} }
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
@ -110,6 +114,10 @@ struct SynthAnlogicPass : public ScriptPass
flatten = false; flatten = false;
continue; continue;
} }
if (args[argidx] == "-nolutram") {
nolutram = true;
continue;
}
if (args[argidx] == "-retime") { if (args[argidx] == "-retime") {
retime = true; retime = true;
continue; continue;
@ -150,18 +158,22 @@ struct SynthAnlogicPass : public ScriptPass
run("synth -run coarse"); run("synth -run coarse");
} }
if (check_label("dram")) if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{ {
run("memory_bram -rules +/anlogic/drams.txt"); run("memory_bram -rules +/anlogic/lutrams.txt");
run("techmap -map +/anlogic/drams_map.v"); run("techmap -map +/anlogic/lutrams_map.v");
run("setundef -zero -params t:EG_LOGIC_DRAM16X4"); run("setundef -zero -params t:EG_LOGIC_DRAM16X4");
} }
if (check_label("fine")) if (check_label("map_ffram"))
{ {
run("opt -fast -mux_undef -undriven -fine"); run("opt -fast -mux_undef -undriven -fine");
run("memory_map"); run("memory_map");
run("opt -undriven -fine"); run("opt -undriven -fine");
}
if (check_label("map_gates"))
{
run("techmap -map +/techmap.v -map +/anlogic/arith_map.v"); run("techmap -map +/techmap.v -map +/anlogic/arith_map.v");
if (retime || help_mode) if (retime || help_mode)
run("abc -dff -D 1", "(only if -retime)"); run("abc -dff -D 1", "(only if -retime)");
@ -187,7 +199,7 @@ struct SynthAnlogicPass : public ScriptPass
run("techmap -map +/anlogic/cells_map.v"); run("techmap -map +/anlogic/cells_map.v");
run("clean"); run("clean");
} }
if (check_label("map_anlogic")) if (check_label("map_anlogic"))
{ {
run("anlogic_fixcarry"); run("anlogic_fixcarry");

4
techlibs/ecp5/Makefile.inc
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@ -8,9 +8,9 @@ $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_sim.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_sim.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_bb.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/cells_bb.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/lutrams_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/lutrams_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/lutram.txt)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/lutrams.txt))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/bram.txt)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/brams.txt))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/arith_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/latches_map.v))
$(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dsp_map.v)) $(eval $(call add_share_file,share/ecp5,techlibs/ecp5/dsp_map.v))

0
techlibs/ecp5/bram.txt → techlibs/ecp5/brams.txt
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0
techlibs/ecp5/lutram.txt → techlibs/ecp5/lutrams.txt
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4
techlibs/ecp5/synth_ecp5.cc
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@ -266,13 +266,13 @@ struct SynthEcp5Pass : public ScriptPass
if (!nobram && check_label("map_bram", "(skip if -nobram)")) if (!nobram && check_label("map_bram", "(skip if -nobram)"))
{ {
run("memory_bram -rules +/ecp5/bram.txt"); run("memory_bram -rules +/ecp5/brams.txt");
run("techmap -map +/ecp5/brams_map.v"); run("techmap -map +/ecp5/brams_map.v");
} }
if (!nolutram && check_label("map_lutram", "(skip if -nolutram)")) if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{ {
run("memory_bram -rules +/ecp5/lutram.txt"); run("memory_bram -rules +/ecp5/lutrams.txt");
run("techmap -map +/ecp5/lutrams_map.v"); run("techmap -map +/ecp5/lutrams_map.v");
} }

2
techlibs/efinix/Makefile.inc
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@ -7,4 +7,4 @@ $(eval $(call add_share_file,share/efinix,techlibs/efinix/cells_map.v))
$(eval $(call add_share_file,share/efinix,techlibs/efinix/arith_map.v)) $(eval $(call add_share_file,share/efinix,techlibs/efinix/arith_map.v))
$(eval $(call add_share_file,share/efinix,techlibs/efinix/cells_sim.v)) $(eval $(call add_share_file,share/efinix,techlibs/efinix/cells_sim.v))
$(eval $(call add_share_file,share/efinix,techlibs/efinix/brams_map.v)) $(eval $(call add_share_file,share/efinix,techlibs/efinix/brams_map.v))
$(eval $(call add_share_file,share/efinix,techlibs/efinix/bram.txt)) $(eval $(call add_share_file,share/efinix,techlibs/efinix/brams.txt))

0
techlibs/efinix/bram.txt → techlibs/efinix/brams.txt
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22
techlibs/efinix/synth_efinix.cc
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@ -60,6 +60,9 @@ struct SynthEfinixPass : public ScriptPass
log(" -retime\n"); log(" -retime\n");
log(" run 'abc' with '-dff -D 1' options\n"); log(" run 'abc' with '-dff -D 1' options\n");
log("\n"); log("\n");
log(" -nobram\n");
log(" do not use EFX_RAM_5K cells in output netlist\n");
log("\n");
log("\n"); log("\n");
log("The following commands are executed by this synthesis command:\n"); log("The following commands are executed by this synthesis command:\n");
help_script(); help_script();
@ -67,7 +70,7 @@ struct SynthEfinixPass : public ScriptPass
} }
string top_opt, edif_file, json_file; string top_opt, edif_file, json_file;
bool flatten, retime; bool flatten, retime, nobram;
void clear_flags() YS_OVERRIDE void clear_flags() YS_OVERRIDE
{ {
@ -76,6 +79,7 @@ struct SynthEfinixPass : public ScriptPass
json_file = ""; json_file = "";
flatten = true; flatten = true;
retime = false; retime = false;
nobram = false;
} }
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
@ -114,6 +118,10 @@ struct SynthEfinixPass : public ScriptPass
retime = true; retime = true;
continue; continue;
} }
if (args[argidx] == "-nobram") {
nobram = true;
continue;
}
break; break;
} }
extra_args(args, argidx, design); extra_args(args, argidx, design);
@ -150,18 +158,22 @@ struct SynthEfinixPass : public ScriptPass
run("synth -run coarse"); run("synth -run coarse");
} }
if (check_label("map_bram", "(skip if -nobram)")) if (!nobram || check_label("map_bram", "(skip if -nobram)"))
{ {
run("memory_bram -rules +/efinix/bram.txt"); run("memory_bram -rules +/efinix/brams.txt");
run("techmap -map +/efinix/brams_map.v"); run("techmap -map +/efinix/brams_map.v");
run("setundef -zero -params t:EFX_RAM_5K"); run("setundef -zero -params t:EFX_RAM_5K");
} }
if (check_label("fine")) if (check_label("map_ffram"))
{ {
run("opt -fast -mux_undef -undriven -fine"); run("opt -fast -mux_undef -undriven -fine");
run("memory_map"); run("memory_map");
run("opt -undriven -fine"); run("opt -undriven -fine");
}
if (check_label("map_gates"))
{
run("techmap -map +/techmap.v -map +/efinix/arith_map.v"); run("techmap -map +/techmap.v -map +/efinix/arith_map.v");
if (retime || help_mode) if (retime || help_mode)
run("abc -dff -D 1", "(only if -retime)"); run("abc -dff -D 1", "(only if -retime)");
@ -194,7 +206,7 @@ struct SynthEfinixPass : public ScriptPass
run("efinix_fixcarry"); run("efinix_fixcarry");
run("clean"); run("clean");
} }
if (check_label("check")) if (check_label("check"))
{ {
run("hierarchy -check"); run("hierarchy -check");

6
techlibs/gowin/Makefile.inc
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@ -7,9 +7,9 @@ $(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_map.v))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_sim.v)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/cells_sim.v))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/arith_map.v)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/arith_map.v))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map.v)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/brams_map.v))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/bram.txt)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/brams.txt))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/drams_map.v)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams_map.v))
$(eval $(call add_share_file,share/gowin,techlibs/gowin/dram.txt)) $(eval $(call add_share_file,share/gowin,techlibs/gowin/lutrams.txt))

0
techlibs/gowin/bram.txt → techlibs/gowin/brams.txt
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0
techlibs/gowin/dram.txt → techlibs/gowin/lutrams.txt
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0
techlibs/gowin/drams_map.v → techlibs/gowin/lutrams_map.v
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27
techlibs/gowin/synth_gowin.cc
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@ -55,7 +55,7 @@ struct SynthGowinPass : public ScriptPass
log(" -nobram\n"); log(" -nobram\n");
log(" do not use BRAM cells in output netlist\n"); log(" do not use BRAM cells in output netlist\n");
log("\n"); log("\n");
log(" -nodram\n"); log(" -nolutram\n");
log(" do not use distributed RAM cells in output netlist\n"); log(" do not use distributed RAM cells in output netlist\n");
log("\n"); log("\n");
log(" -noflatten\n"); log(" -noflatten\n");
@ -80,7 +80,7 @@ struct SynthGowinPass : public ScriptPass
} }
string top_opt, vout_file; string top_opt, vout_file;
bool retime, nobram, nodram, flatten, nodffe, nowidelut, abc9, noiopads; bool retime, nobram, nolutram, flatten, nodffe, nowidelut, abc9, noiopads;
void clear_flags() YS_OVERRIDE void clear_flags() YS_OVERRIDE
{ {
@ -90,7 +90,7 @@ struct SynthGowinPass : public ScriptPass
flatten = true; flatten = true;
nobram = false; nobram = false;
nodffe = false; nodffe = false;
nodram = false; nolutram = false;
nowidelut = false; nowidelut = false;
abc9 = false; abc9 = false;
noiopads = false; noiopads = false;
@ -128,8 +128,8 @@ struct SynthGowinPass : public ScriptPass
nobram = true; nobram = true;
continue; continue;
} }
if (args[argidx] == "-nodram") { if (args[argidx] == "-nolutram" || /*deprecated*/args[argidx] == "-nodram") {
nodram = true; nolutram = true;
continue; continue;
} }
if (args[argidx] == "-nodffe") { if (args[argidx] == "-nodffe") {
@ -188,24 +188,28 @@ struct SynthGowinPass : public ScriptPass
run("synth -run coarse"); run("synth -run coarse");
} }
if (!nobram && check_label("bram", "(skip if -nobram)")) if (!nobram && check_label("map_bram", "(skip if -nobram)"))
{ {
run("memory_bram -rules +/gowin/bram.txt"); run("memory_bram -rules +/gowin/brams.txt");
run("techmap -map +/gowin/brams_map.v -map +/gowin/cells_sim.v"); run("techmap -map +/gowin/brams_map.v -map +/gowin/cells_sim.v");
} }
if (!nodram && check_label("dram", "(skip if -nodram)")) if (!nolutram && check_label("map_lutram", "(skip if -nolutram)"))
{ {
run("memory_bram -rules +/gowin/dram.txt"); run("memory_bram -rules +/gowin/lutrams.txt");
run("techmap -map +/gowin/drams_map.v"); run("techmap -map +/gowin/lutrams_map.v");
run("determine_init"); run("determine_init");
} }
if (check_label("fine")) if (check_label("map_ffram"))
{ {
run("opt -fast -mux_undef -undriven -fine"); run("opt -fast -mux_undef -undriven -fine");
run("memory_map"); run("memory_map");
run("opt -undriven -fine"); run("opt -undriven -fine");
}
if (check_label("map_gates"))
{
run("techmap -map +/techmap.v -map +/gowin/arith_map.v"); run("techmap -map +/techmap.v -map +/gowin/arith_map.v");
run("techmap -map +/techmap.v"); run("techmap -map +/techmap.v");
if (retime || help_mode) if (retime || help_mode)
@ -248,7 +252,6 @@ struct SynthGowinPass : public ScriptPass
run("iopadmap -bits -inpad IBUF O:I -outpad OBUF I:O " run("iopadmap -bits -inpad IBUF O:I -outpad OBUF I:O "
"-toutpad TBUF OEN:I:O -tinoutpad IOBUF OEN:O:I:IO", "(unless -noiopads)"); "-toutpad TBUF OEN:I:O -tinoutpad IOBUF OEN:O:I:IO", "(unless -noiopads)");
run("clean"); run("clean");
} }
if (check_label("check")) if (check_label("check"))

2
techlibs/ice40/ice40_opt.cc
View File

@ -128,6 +128,8 @@ static void run_ice40_opts(Module *module)
new_attr.insert(std::make_pair(a.first, a.second)); new_attr.insert(std::make_pair(a.first, a.second));
else if (a.first.in(ID(SB_LUT4.name), ID::keep, ID(module_not_derived))) else if (a.first.in(ID(SB_LUT4.name), ID::keep, ID(module_not_derived)))
continue; continue;
else if (a.first.begins_with("\\SB_CARRY.\\"))
continue;
else else
log_abort(); log_abort();
cell->attributes = std::move(new_attr); cell->attributes = std::move(new_attr);

10
techlibs/intel/synth_intel.cc
View File

@ -187,10 +187,10 @@ struct SynthIntelPass : public ScriptPass {
} }
if (!nobram && check_label("map_bram", "(skip if -nobram)")) { if (!nobram && check_label("map_bram", "(skip if -nobram)")) {
if (family_opt == "cycloneiv" || if (family_opt == "cycloneiv" ||
family_opt == "cycloneive" || family_opt == "cycloneive" ||
family_opt == "max10" || family_opt == "max10" ||
help_mode) { help_mode) {
run("memory_bram -rules +/intel/common/brams_m9k.txt", "(if applicable for family)"); run("memory_bram -rules +/intel/common/brams_m9k.txt", "(if applicable for family)");
run("techmap -map +/intel/common/brams_map_m9k.v", "(if applicable for family)"); run("techmap -map +/intel/common/brams_map_m9k.v", "(if applicable for family)");
} else { } else {
@ -224,7 +224,7 @@ struct SynthIntelPass : public ScriptPass {
if (check_label("map_cells")) { if (check_label("map_cells")) {
if (iopads || help_mode) if (iopads || help_mode)
run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I", "(if -iopads)"); run("iopadmap -bits -outpad $__outpad I:O -inpad $__inpad O:I", "(if -iopads)");
run(stringf("techmap -map +/intel/%s/cells_map.v", family_opt.c_str())); run(stringf("techmap -map +/intel/%s/cells_map.v", family_opt.c_str()));
run("dffinit -highlow -ff dffeas q power_up"); run("dffinit -highlow -ff dffeas q power_up");
run("clean -purge"); run("clean -purge");
} }