mirror of https://github.com/YosysHQ/yosys.git
ffM before addAB
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@ -38,8 +38,8 @@ void pack_xilinx_dsp(dict<SigBit, Cell*> &bit_to_driver, xilinx_dsp_pm &pm)
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log("ffA: %s\n", log_id(st.ffA, "--"));
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log("ffB: %s\n", log_id(st.ffB, "--"));
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log("dsp: %s\n", log_id(st.dsp, "--"));
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log("addAB: %s\n", log_id(st.addAB, "--"));
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log("ffM: %s\n", log_id(st.ffM, "--"));
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log("addAB: %s\n", log_id(st.addAB, "--"));
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log("ffP: %s\n", log_id(st.ffP, "--"));
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//log("muxP: %s\n", log_id(st.muxP, "--"));
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log("sigPused: %s\n", log_signal(st.sigPused));
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