cxxrtl: remove `module::steps`. (breaking change)

This approach to tracking simulation time was a mistake that I did not
catch in review. It has several issues:
1. There is absolutely no requirement to call `step()`, as it is
   a convenience function. In particular, `steps` will not be
   incremented in submodules if `-noflatten` is used.
2. The semantics of `steps` does not match that of the Verilog `$time`
   construct.
3. There is no way to make the semantics of `%t` match that of Verilog.
4. The `module` interface is intentionally very barebones. It is little
   more than a container for three method pointers, `reset`, `eval`,
   and `commit`. Adding ancillary data to it goes against this.

If similar functionality is introduced again it should probably be
a variable that is global per toplevel design using some object that is
unique for an entire hierarchy of modules, and ideally exposed via
the C API. For now, it is being removed (in this commit) and (in next
commit) the capability is being reintroduced through a context object
that can be specified for `eval()`.

backends/cxxrtl/cxxrtl_backend.cc

@@ -1077,7 +1077,7 @@ struct CxxrtlWorker {
 				fmt.emit_cxxrtl(f, indent, [this](const RTLIL::SigSpec &sig) { dump_sigspec_rhs(sig); });
 			dec_indent();
 			f << indent << "};\n";
-			f << indent << print_output << " << formatter(steps, steps);\n";
+			f << indent << print_output << " << formatter(0, 0.0);\n";
 		dec_indent();
 		f << indent << "}\n";
 	}

backends/cxxrtl/runtime/cxxrtl/cxxrtl.h

@@ -1331,10 +1331,7 @@ struct module {
 	virtual bool eval() = 0;
 	virtual bool commit() = 0;
 
-	unsigned int steps = 0;
-
 	size_t step() {
-		++steps;
 		size_t deltas = 0;
 		bool converged = false;
 		do {