mirror of https://github.com/YosysHQ/yosys.git
cxxrtl: refactor the formatter and use a closure.
This commit achieves three roughly equally important goals: 1. To bring the rendering code in kernel/fmt.cc and in cxxrtl.h as close together as possible, with an ideal of only having the bigint library as the difference between the render functions. 2. To make the treatment of `$time` and `$realtime` in CXXRTL closer to the Verilog semantics, at least in the formatting code. 3. To change the code generator so that all of the `$print`-to-`string` conversion code is contained inside of a closure. There are two reasons to aim for goal (3): a. Because output redirection through definition of a global ostream object is neither convenient nor useful for environments where the output is consumed by other code rather than being printed on a terminal. b. Because it may be desirable to, in some cases, ignore the `$print` cells that are present in the netlist based on a runtime decision. This is doubly true for an upcoming `$check` cell implementing assertions, since failing a `$check` would by default cause a crash.
This commit is contained in:
Catherine
parent
bf1a99da09
commit
a33acb7cd9
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@ -1072,9 +1072,12 @@ struct CxxrtlWorker {
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dump_sigspec_rhs(cell->getPort(ID::EN));
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f << " == value<1>{1u}) {\n";
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inc_indent();
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f << indent << print_output;
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fmt.emit_cxxrtl(f, [this](const RTLIL::SigSpec &sig) { dump_sigspec_rhs(sig); });
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f << ";\n";
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f << indent << "auto formatter = [&](int64_t itime, double ftime) {\n";
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inc_indent();
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fmt.emit_cxxrtl(f, indent, [this](const RTLIL::SigSpec &sig) { dump_sigspec_rhs(sig); });
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dec_indent();
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f << indent << "};\n";
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f << indent << print_output << " << formatter(steps, steps);\n";
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dec_indent();
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f << indent << "}\n";
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}
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@ -565,7 +565,7 @@ struct value : public expr_base<value<Bits>> {
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}
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value<Bits> neg() const {
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return value<Bits> { 0u }.sub(*this);
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return value<Bits>().sub(*this);
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}
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bool ucmp(const value<Bits> &other) const {
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@ -763,102 +763,134 @@ std::ostream &operator<<(std::ostream &os, const value<Bits> &val) {
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return os;
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}
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template<size_t Bits>
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struct value_formatted {
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const value<Bits> &val;
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bool character;
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bool justify_left;
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char padding;
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int width;
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int base;
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bool signed_;
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bool plus;
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// Must be kept in sync with `struct FmtPart` in kernel/fmt.h!
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// Default member initializers would make this a non-aggregate-type in C++11, so they are commented out.
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struct fmt_part {
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enum {
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STRING = 0,
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INTEGER = 1,
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CHARACTER = 2,
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TIME = 3,
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} type;
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value_formatted(const value<Bits> &val, bool character, bool justify_left, char padding, int width, int base, bool signed_, bool plus) :
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val(val), character(character), justify_left(justify_left), padding(padding), width(width), base(base), signed_(signed_), plus(plus) {}
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value_formatted(const value_formatted<Bits> &) = delete;
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value_formatted<Bits> &operator=(const value_formatted<Bits> &rhs) = delete;
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// STRING type
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std::string str;
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// INTEGER/CHARACTER types
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// + value<Bits> val;
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// INTEGER/CHARACTER/TIME types
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enum {
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RIGHT = 0,
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LEFT = 1,
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} justify; // = RIGHT;
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char padding; // = '\0';
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size_t width; // = 0;
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// INTEGER type
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unsigned base; // = 10;
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bool signed_; // = false;
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bool plus; // = false;
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// TIME type
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bool realtime; // = false;
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// + int64_t itime;
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// + double ftime;
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// Format the part as a string.
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//
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// The values of `itime` and `ftime` are used for `$time` and `$realtime`, correspondingly.
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template<size_t Bits>
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std::string render(value<Bits> val, int64_t itime, double ftime)
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{
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// We might want to replace some of these bit() calls with direct
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// chunk access if it turns out to be slow enough to matter.
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std::string buf;
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switch (type) {
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case STRING:
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return str;
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case CHARACTER: {
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buf.reserve(Bits/8);
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for (int i = 0; i < Bits; i += 8) {
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char ch = 0;
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for (int j = 0; j < 8 && i + j < int(Bits); j++)
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if (val.bit(i + j))
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ch |= 1 << j;
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if (ch != 0)
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buf.append({ch});
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}
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std::reverse(buf.begin(), buf.end());
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break;
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}
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case INTEGER: {
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size_t width = Bits;
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if (base != 10) {
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width = 0;
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for (size_t index = 0; index < Bits; index++)
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if (val.bit(index))
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width = index + 1;
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}
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if (base == 2) {
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for (size_t i = width; i > 0; i--)
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buf += (val.bit(i - 1) ? '1' : '0');
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} else if (base == 8 || base == 16) {
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size_t step = (base == 16) ? 4 : 3;
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for (size_t index = 0; index < width; index += step) {
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uint8_t value = val.bit(index) | (val.bit(index + 1) << 1) | (val.bit(index + 2) << 2);
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if (step == 4)
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value |= val.bit(index + 3) << 3;
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buf += "0123456789abcdef"[value];
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}
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std::reverse(buf.begin(), buf.end());
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} else if (base == 10) {
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bool negative = signed_ && val.is_neg();
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if (negative)
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val = val.neg();
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if (val.is_zero())
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buf += '0';
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value<(Bits > 4 ? Bits : 4)> xval = val.template zext<(Bits > 4 ? Bits : 4)>();
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while (!xval.is_zero()) {
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value<(Bits > 4 ? Bits : 4)> quotient, remainder;
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if (Bits >= 4)
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std::tie(quotient, remainder) = xval.udivmod(value<(Bits > 4 ? Bits : 4)>{10u});
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else
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std::tie(quotient, remainder) = std::make_pair(value<(Bits > 4 ? Bits : 4)>{0u}, xval);
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buf += '0' + remainder.template trunc<4>().template get<uint8_t>();
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xval = quotient;
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}
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if (negative || plus)
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buf += negative ? '-' : '+';
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std::reverse(buf.begin(), buf.end());
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} else assert(false && "Unsupported base for fmt_part");
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break;
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}
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case TIME: {
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buf = realtime ? std::to_string(ftime) : std::to_string(itime);
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break;
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}
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}
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std::string str;
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assert(width == 0 || padding != '\0');
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if (justify == RIGHT && buf.size() < width) {
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size_t pad_width = width - buf.size();
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if (padding == '0' && (buf.front() == '+' || buf.front() == '-')) {
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str += buf.front();
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buf.erase(0, 1);
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}
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str += std::string(pad_width, padding);
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}
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str += buf;
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if (justify == LEFT && buf.size() < width)
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str += std::string(width - buf.size(), padding);
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return str;
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}
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};
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template<size_t Bits>
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std::ostream &operator<<(std::ostream &os, const value_formatted<Bits> &vf)
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{
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value<Bits> val = vf.val;
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std::string buf;
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// We might want to replace some of these bit() calls with direct
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// chunk access if it turns out to be slow enough to matter.
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if (!vf.character) {
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size_t width = Bits;
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if (vf.base != 10) {
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width = 0;
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for (size_t index = 0; index < Bits; index++)
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if (val.bit(index))
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width = index + 1;
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}
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if (vf.base == 2) {
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for (size_t i = width; i > 0; i--)
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buf += (val.bit(i - 1) ? '1' : '0');
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} else if (vf.base == 8 || vf.base == 16) {
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size_t step = (vf.base == 16) ? 4 : 3;
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for (size_t index = 0; index < width; index += step) {
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uint8_t value = val.bit(index) | (val.bit(index + 1) << 1) | (val.bit(index + 2) << 2);
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if (step == 4)
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value |= val.bit(index + 3) << 3;
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buf += "0123456789abcdef"[value];
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}
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std::reverse(buf.begin(), buf.end());
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} else if (vf.base == 10) {
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bool negative = vf.signed_ && val.is_neg();
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if (negative)
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val = val.neg();
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if (val.is_zero())
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buf += '0';
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while (!val.is_zero()) {
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value<Bits> quotient, remainder;
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if (Bits >= 4)
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std::tie(quotient, remainder) = val.udivmod(value<Bits>{10u});
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else
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std::tie(quotient, remainder) = std::make_pair(value<Bits>{0u}, val);
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buf += '0' + remainder.template trunc<(Bits > 4 ? 4 : Bits)>().val().template get<uint8_t>();
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val = quotient;
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}
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if (negative || vf.plus)
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buf += negative ? '-' : '+';
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std::reverse(buf.begin(), buf.end());
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} else assert(false);
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} else {
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buf.reserve(Bits/8);
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for (int i = 0; i < Bits; i += 8) {
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char ch = 0;
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for (int j = 0; j < 8 && i + j < int(Bits); j++)
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if (val.bit(i + j))
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ch |= 1 << j;
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if (ch != 0)
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buf.append({ch});
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}
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std::reverse(buf.begin(), buf.end());
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}
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assert(vf.width == 0 || vf.padding != '\0');
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if (!vf.justify_left && buf.size() < vf.width) {
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size_t pad_width = vf.width - buf.size();
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if (vf.padding == '0' && (buf.front() == '+' || buf.front() == '-')) {
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os << buf.front();
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buf.erase(0, 1);
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}
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os << std::string(pad_width, vf.padding);
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}
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os << buf;
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if (vf.justify_left && buf.size() < vf.width)
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os << std::string(vf.width - buf.size(), vf.padding);
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return os;
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}
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// An object that can be passed to a `commit()` method in order to produce a replay log of every state change in
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// the simulation.
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struct observer {
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124
kernel/fmt.cc
124
kernel/fmt.cc
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@ -569,82 +569,60 @@ std::vector<VerilogFmtArg> Fmt::emit_verilog() const
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return args;
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}
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void Fmt::emit_cxxrtl(std::ostream &f, std::function<void(const RTLIL::SigSpec &)> emit_sig) const
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std::string escape_cxx_string(const std::string &input)
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{
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for (auto &part : parts) {
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switch (part.type) {
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case FmtPart::STRING:
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f << " << \"";
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for (char c : part.str) {
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switch (c) {
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case '\\':
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YS_FALLTHROUGH
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case '"':
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f << '\\' << c;
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break;
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case '\a':
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f << "\\a";
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break;
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case '\b':
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f << "\\b";
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break;
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case '\f':
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f << "\\f";
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break;
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case '\n':
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f << "\\n";
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break;
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case '\r':
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f << "\\r";
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break;
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case '\t':
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f << "\\t";
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break;
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case '\v':
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f << "\\v";
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break;
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default:
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f << c;
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break;
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}
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}
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f << '"';
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break;
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case FmtPart::INTEGER:
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case FmtPart::CHARACTER: {
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f << " << value_formatted<" << part.sig.size() << ">(";
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emit_sig(part.sig);
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f << ", " << (part.type == FmtPart::CHARACTER);
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f << ", " << (part.justify == FmtPart::LEFT);
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f << ", (char)" << (int)part.padding;
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f << ", " << part.width;
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f << ", " << part.base;
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f << ", " << part.signed_;
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f << ", " << part.plus;
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f << ')';
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break;
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}
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case FmtPart::TIME: {
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// CXXRTL only records steps taken, so there's no difference between
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// the values taken by $time and $realtime.
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f << " << value_formatted<64>(";
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f << "value<64>{steps}";
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f << ", " << (part.type == FmtPart::CHARACTER);
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f << ", " << (part.justify == FmtPart::LEFT);
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f << ", (char)" << (int)part.padding;
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f << ", " << part.width;
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f << ", " << part.base;
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f << ", " << part.signed_;
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f << ", " << part.plus;
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f << ')';
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break;
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}
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default: log_abort();
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std::string output = "\"";
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for (auto c : input) {
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if (::isprint(c)) {
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if (c == '\\')
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output.push_back('\\');
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output.push_back(c);
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} else {
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char l = c & 0xf, h = (c >> 4) & 0xf;
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output.append("\\x");
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output.push_back((h < 10 ? '0' + h : 'a' + h - 10));
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output.push_back((l < 10 ? '0' + l : 'a' + l - 10));
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}
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}
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output.push_back('"');
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if (output.find('\0') != std::string::npos) {
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output.insert(0, "std::string {");
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output.append(stringf(", %zu}", input.size()));
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}
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return output;
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}
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void Fmt::emit_cxxrtl(std::ostream &os, std::string indent, std::function<void(const RTLIL::SigSpec &)> emit_sig) const
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{
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os << indent << "std::string buf;\n";
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for (auto &part : parts) {
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os << indent << "buf += fmt_part { ";
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os << "fmt_part::";
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switch (part.type) {
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case FmtPart::STRING: os << "STRING"; break;
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case FmtPart::INTEGER: os << "INTEGER"; break;
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case FmtPart::CHARACTER: os << "CHARACTER"; break;
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case FmtPart::TIME: os << "TIME"; break;
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}
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os << ", ";
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os << escape_cxx_string(part.str) << ", ";
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os << "fmt_part::";
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switch (part.justify) {
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case FmtPart::LEFT: os << "LEFT"; break;
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case FmtPart::RIGHT: os << "RIGHT"; break;
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}
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os << ", ";
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os << "(char)" << (int)part.padding << ", ";
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os << part.width << ", ";
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os << part.base << ", ";
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os << part.signed_ << ", ";
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os << part.plus << ", ";
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os << part.realtime;
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os << " }.render(";
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emit_sig(part.sig);
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os << ", itime, ftime);\n";
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}
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os << indent << "return buf;\n";
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}
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std::string Fmt::render() const
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@ -50,6 +50,7 @@ struct VerilogFmtArg {
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// RTLIL format part, such as the substitutions in:
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// "foo {4:> 4du} bar {2:<01hs}"
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// Must be kept in sync with `struct fmt_part` in backends/cxxrtl/runtime/cxxrtl/cxxrtl.h!
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struct FmtPart {
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enum {
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STRING = 0,
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@ -71,7 +72,7 @@ struct FmtPart {
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} justify = RIGHT;
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char padding = '\0';
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size_t width = 0;
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// INTEGER type
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unsigned base = 10;
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bool signed_ = false;
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@ -93,7 +94,7 @@ public:
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void parse_verilog(const std::vector<VerilogFmtArg> &args, bool sformat_like, int default_base, RTLIL::IdString task_name, RTLIL::IdString module_name);
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std::vector<VerilogFmtArg> emit_verilog() const;
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void emit_cxxrtl(std::ostream &f, std::function<void(const RTLIL::SigSpec &)> emit_sig) const;
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void emit_cxxrtl(std::ostream &os, std::string indent, std::function<void(const RTLIL::SigSpec &)> emit_sig) const;
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std::string render() const;
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@ -2,8 +2,13 @@
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int main()
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{
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struct : public performer {
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int64_t time() const override { return 1; }
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void on_print(const std::string &output, const cxxrtl::metadata_map &) override { std::cerr << output; }
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} performer;
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cxxrtl_design::p_always__full uut;
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uut.p_clk.set(!uut.p_clk);
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uut.step();
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uut.step(&performer);
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return 0;
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}
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