mirror of https://github.com/YosysHQ/yosys.git
7 lines
316 B
Bash
7 lines
316 B
Bash
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#!/bin/bash
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set -ex
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sed 's/SB_MAC16/SB_MAC16_UUT/; /SB_MAC16_UUT/,/endmodule/ p; d;' < ../cells_sim.v > test_dsp_model_uut.v
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cat /opt/lscc/iCEcube2.2017.01/verilog/sb_ice_syn.v > test_dsp_model_ref.v
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iverilog -s testbench -o test_dsp_model test_dsp_model.v test_dsp_model_uut.v test_dsp_model_ref.v
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./test_dsp_model
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