yosys/backends/btor/btor.ys

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proc;
opt; opt_const -mux_undef; opt;
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rename -hide;;;
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#converting pmux to mux
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techmap -share_map pmux2mux.v;;
#explicit type conversion
splice; opt;
#extracting memories;
memory_dff -wr_only; memory_collect;;
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#flatten design
flatten;;
#converting asyn memory write to syn memory
memory_unpack;
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#cell output to be a single wire
splitnets -driver;
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setundef -zero -undriven;
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opt;;;
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