2021-11-16 11:30:23 -06:00
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/*
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* yosys -- Yosys Open SYnthesis Suite
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*
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* Copyright (C) 2012 Aki "lethalbit" Van Ness <aki@yosyshq.com> <aki@lethalbit.net>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include "kernel/rtlil.h"
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#include "kernel/register.h"
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#include "kernel/sigtools.h"
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#include "kernel/celltypes.h"
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#include "kernel/cellaigs.h"
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#include "kernel/log.h"
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#include <string>
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#include <algorithm>
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#include <unordered_map>
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#include <vector>
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USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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2022-01-14 08:41:52 -06:00
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struct JnyWriter
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{
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private:
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std::ostream &f;
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bool _use_selection;
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2022-02-24 09:39:30 -06:00
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// XXX(aki): TODO: this needs to be updated to us
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// dict<T, V> and then coalesce_cells needs to be updated
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// but for now for the PoC this looks to be sufficient
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std::unordered_map<std::string, std::vector<Cell*>> _cells{};
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bool _include_connections;
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bool _include_attributes;
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bool _include_properties;
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2022-02-17 10:35:45 -06:00
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string escape_string(string str) {
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std::string newstr;
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auto itr = str.begin();
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for(; itr != str.end(); ++itr) {
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switch (*itr) {
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case '\\': {
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newstr += *itr++;
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newstr += *itr;
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break;
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} case '\n': {
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newstr += "\\n";
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break;
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} case '\f': {
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newstr += "\\f";
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break;
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} case '\t': {
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newstr += "\\t";
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break;
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} case '\r': {
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newstr += "\\r";
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break;
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} case '\"': {
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newstr += "\\\"";
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break;
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} case '\b': {
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newstr += "\\b";
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break;
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} default: {
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newstr += *itr;
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}
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}
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}
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return newstr;
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}
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// XXX(aki): I know this is far from ideal but i'm out of spoons and cant focus so
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// it'll have to do for now,
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void coalesce_cells(Module* mod)
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{
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for (auto cell : mod->cells()) {
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const auto cell_type = escape_string(RTLIL::unescape_id(cell->type));
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if (_cells.find(cell_type) == _cells.end())
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_cells.emplace(cell_type, std::vector<Cell*>());
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_cells.at(cell_type).push_back(cell);
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}
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}
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2022-02-03 04:04:45 -06:00
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// XXX(aki): this is a lazy way to do this i know,,,
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std::string gen_indent(const uint16_t level)
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{
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std::stringstream s;
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for (uint16_t i = 0; i <= level; ++i)
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{
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s << " ";
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}
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return s.str();
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}
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public:
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JnyWriter(std::ostream &f, bool use_selection, bool connections, bool attributes, bool properties) noexcept:
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f(f), _use_selection(use_selection),
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_include_connections(connections), _include_attributes(attributes), _include_properties(properties)
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{ }
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void write_metadata(Design *design, uint16_t indent_level = 0)
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{
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log_assert(design != nullptr);
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design->sort();
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f << "{\n";
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f << stringf(" \"generator\": \"%s\",\n", escape_string(yosys_version_str).c_str());
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// XXX(aki): Replace this with a proper version info eventually:tm:
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f << " \"version\": \"0.0.0\",\n";
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f << " \"features\": [";
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size_t fnum{0};
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if (_include_connections) {
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++fnum;
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f << "\"connections\"";
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}
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if (_include_attributes) {
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if (fnum > 0)
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f << ", ";
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++fnum;
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f << "\"attributes\"";
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}
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if (_include_properties) {
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if (fnum > 0)
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f << ", ";
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++fnum;
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f << "\"properties\"";
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}
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f << "],\n";
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f << " \"modules\": [\n";
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bool first{true};
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for (auto mod : _use_selection ? design->selected_modules() : design->modules()) {
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if (!first)
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f << ",\n";
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write_module(mod, indent_level + 2);
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first = false;
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}
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f << "\n";
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f << " ]\n";
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f << "}\n";
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}
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2022-02-17 07:11:58 -06:00
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void write_sigspec(const RTLIL::SigSpec& sig, uint16_t indent_level = 0) {
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const auto _indent = gen_indent(indent_level);
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f << _indent << " {\n";
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f << _indent << " \"width\": \"" << sig.size() << "\",\n";
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f << _indent << " \"type\": \"";
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if (sig.is_wire()) {
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f << "wire";
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} else if (sig.is_chunk()) {
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f << "chunk";
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} else if (sig.is_bit()) {
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f << "bit";
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} else {
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f << "unknown";
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}
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f << "\",\n";
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f << _indent << " \"const\": ";
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if (sig.has_const()) {
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f << "true";
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} else {
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f << "false";
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}
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f << "\n";
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f << _indent << " }";
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}
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void write_mod_conn(const std::pair<RTLIL::SigSpec, RTLIL::SigSpec>& conn, uint16_t indent_level = 0) {
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const auto _indent = gen_indent(indent_level);
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f << _indent << " {\n";
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f << _indent << " \"signals\": [\n";
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write_sigspec(conn.first, indent_level + 2);
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f << ",\n";
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write_sigspec(conn.second, indent_level + 2);
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f << "\n";
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f << _indent << " ]\n";
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f << _indent << " }";
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}
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void write_cell_conn(const std::pair<RTLIL::IdString, RTLIL::SigSpec>& sig, uint16_t indent_level = 0) {
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const auto _indent = gen_indent(indent_level);
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f << _indent << " {\n";
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f << _indent << " \"name\": \"" << escape_string(RTLIL::unescape_id(sig.first)) << "\",\n";
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f << _indent << " \"signals\": [\n";
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write_sigspec(sig.second, indent_level + 2);
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f << "\n";
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f << _indent << " ]\n";
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f << _indent << " }";
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}
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void write_module(Module* mod, uint16_t indent_level = 0) {
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log_assert(mod != nullptr);
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coalesce_cells(mod);
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const auto _indent = gen_indent(indent_level);
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f << _indent << "{\n";
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f << stringf(" %s\"name\": \"%s\",\n", _indent.c_str(), escape_string(RTLIL::unescape_id(mod->name)).c_str());
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f << _indent << " \"cell_sorts\": [\n";
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bool first_sort{true};
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for (auto& sort : _cells) {
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if (!first_sort)
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f << ",\n";
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write_cell_sort(sort, indent_level + 2);
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first_sort = false;
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}
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f << "\n";
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f << _indent << " ]";
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if (_include_connections) {
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f << ",\n" << _indent << " \"connections\": [\n";
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bool first_conn{true};
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for (const auto& conn : mod->connections()) {
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if (!first_conn)
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f << ",\n";
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write_mod_conn(conn, indent_level + 2);
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first_conn = false;
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}
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f << _indent << " ]";
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}
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if (_include_attributes) {
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f << ",\n" << _indent << " \"attributes\": {\n";
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write_prams(mod->attributes, indent_level + 2);
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f << "\n";
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f << _indent << " }";
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}
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f << "\n" << _indent << "}";
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}
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void write_cell_ports(RTLIL::Cell* port_cell, uint64_t indent_level = 0) {
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const auto _indent = gen_indent(indent_level);
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bool first_port{true};
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for (auto con : port_cell->connections()) {
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if (!first_port)
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f << ",\n";
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f << _indent << " {\n";
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f << stringf(" %s\"name\": \"%s\",\n", _indent.c_str(), escape_string(RTLIL::unescape_id(con.first)).c_str());
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f << _indent << " \"direction\": \"";
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if (port_cell->input(con.first))
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f << "i";
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if (port_cell->input(con.first))
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f << "o";
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f << "\",\n";
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if (con.second.size() == 1)
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f << _indent << " \"range\": [0, 0]\n";
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else
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f << stringf(" %s\"range\": [%d, %d]\n", _indent.c_str(), con.second.size(), 0);
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f << _indent << " }";
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first_port = false;
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}
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f << "\n";
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}
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void write_cell_sort(std::pair<const std::string, std::vector<Cell*>>& sort, uint16_t indent_level = 0) {
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const auto port_cell = sort.second.front();
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const auto _indent = gen_indent(indent_level);
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f << _indent << "{\n";
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f << stringf(" %s\"type\": %s,\n", _indent.c_str(), sort.first.c_str());
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f << _indent << " \"ports\": [\n";
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write_cell_ports(port_cell, indent_level + 2);
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f << _indent << " ],\n" << _indent << " \"cells\": [\n";
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bool first_cell{true};
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for (auto& cell : sort.second) {
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if (!first_cell)
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f << ",\n";
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write_cell(cell, indent_level + 2);
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first_cell = false;
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}
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2022-02-03 04:04:45 -06:00
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|
|
|
2021-12-03 12:43:11 -06:00
|
|
|
f << "\n";
|
2022-02-03 04:04:45 -06:00
|
|
|
f << _indent << " ]\n";
|
|
|
|
f << _indent << "}";
|
2021-12-03 12:43:11 -06:00
|
|
|
}
|
2021-12-03 12:44:09 -06:00
|
|
|
|
2022-02-03 04:04:45 -06:00
|
|
|
void write_param_val(const Const& v) {
|
2021-12-03 12:44:09 -06:00
|
|
|
if ((v.flags & RTLIL::ConstFlags::CONST_FLAG_STRING) == RTLIL::ConstFlags::CONST_FLAG_STRING) {
|
|
|
|
const auto str = v.decode_string();
|
|
|
|
|
2022-02-03 04:04:45 -06:00
|
|
|
// XXX(aki): TODO, uh, yeah
|
2021-12-03 12:44:09 -06:00
|
|
|
|
2022-02-17 10:35:45 -06:00
|
|
|
f << "\"" << escape_string(str) << "\"";
|
2021-12-03 12:44:09 -06:00
|
|
|
} else if ((v.flags & RTLIL::ConstFlags::CONST_FLAG_SIGNED) == RTLIL::ConstFlags::CONST_FLAG_SIGNED) {
|
2022-02-17 07:15:48 -06:00
|
|
|
f << stringf("\"%dsd %d\"", v.size(), v.as_int(true));
|
2021-12-03 12:44:09 -06:00
|
|
|
} else if ((v.flags & RTLIL::ConstFlags::CONST_FLAG_REAL) == RTLIL::ConstFlags::CONST_FLAG_REAL) {
|
|
|
|
|
|
|
|
} else {
|
2022-02-17 10:35:45 -06:00
|
|
|
f << "\"" << escape_string(v.as_string()) << "\"";
|
2021-12-03 12:44:09 -06:00
|
|
|
}
|
2021-11-16 11:30:23 -06:00
|
|
|
}
|
|
|
|
|
2022-02-03 04:04:45 -06:00
|
|
|
void write_prams(dict<RTLIL::IdString, RTLIL::Const>& params, uint16_t indent_level = 0) {
|
|
|
|
const auto _indent = gen_indent(indent_level);
|
2021-11-16 14:25:14 -06:00
|
|
|
|
|
|
|
bool first_param{true};
|
2022-02-03 04:04:45 -06:00
|
|
|
for (auto& param : params) {
|
2021-11-16 14:25:14 -06:00
|
|
|
if (!first_param)
|
|
|
|
f << stringf(",\n");
|
2021-11-18 06:35:14 -06:00
|
|
|
const auto param_val = param.second;
|
2021-12-03 12:44:09 -06:00
|
|
|
if (!param_val.empty()) {
|
2022-02-17 10:35:45 -06:00
|
|
|
f << stringf(" %s\"%s\": ", _indent.c_str(), escape_string(RTLIL::unescape_id(param.first)).c_str());
|
2021-12-03 12:44:09 -06:00
|
|
|
write_param_val(param_val);
|
|
|
|
} else {
|
2022-02-17 10:35:45 -06:00
|
|
|
f << stringf(" %s\"%s\": true", _indent.c_str(), escape_string(RTLIL::unescape_id(param.first)).c_str());
|
2021-12-03 12:44:09 -06:00
|
|
|
}
|
2021-11-16 14:25:14 -06:00
|
|
|
|
|
|
|
first_param = false;
|
|
|
|
}
|
2022-02-03 04:04:45 -06:00
|
|
|
}
|
|
|
|
|
|
|
|
void write_cell(Cell* cell, uint16_t indent_level = 0) {
|
|
|
|
const auto _indent = gen_indent(indent_level);
|
|
|
|
log_assert(cell != nullptr);
|
|
|
|
|
|
|
|
f << _indent << " {\n";
|
2022-02-17 10:35:45 -06:00
|
|
|
f << stringf(" %s\"name\": \"%s\"", _indent.c_str(), escape_string(RTLIL::unescape_id(cell->name)).c_str());
|
2022-02-03 04:04:45 -06:00
|
|
|
|
2022-02-17 07:11:58 -06:00
|
|
|
if (_include_connections) {
|
|
|
|
f << ",\n" << _indent << " \"connections\": [\n";
|
|
|
|
|
|
|
|
bool first_conn{true};
|
|
|
|
for (const auto& conn : cell->connections()) {
|
|
|
|
if (!first_conn)
|
|
|
|
f << ",\n";
|
|
|
|
|
|
|
|
write_cell_conn(conn, indent_level + 2);
|
|
|
|
|
|
|
|
first_conn = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
f << "\n";
|
|
|
|
f << _indent << " ]";
|
|
|
|
}
|
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
if (_include_attributes) {
|
2022-02-17 07:11:58 -06:00
|
|
|
f << ",\n" << _indent << " \"attributes\": {\n";
|
2022-02-03 04:04:45 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
write_prams(cell->attributes, indent_level + 2);
|
2022-02-03 04:04:45 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
f << "\n";
|
|
|
|
f << _indent << " }";
|
|
|
|
}
|
2022-02-03 04:04:45 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
if (_include_properties) {
|
2022-02-17 07:11:58 -06:00
|
|
|
f << ",\n" << _indent << " \"parameters\": {\n";
|
2022-02-03 04:04:45 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
write_prams(cell->parameters, indent_level + 2);
|
|
|
|
|
|
|
|
f << "\n";
|
|
|
|
f << _indent << " }";
|
|
|
|
}
|
2021-11-16 14:25:14 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
f << "\n" << _indent << " }";
|
2021-11-16 11:30:23 -06:00
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2022-01-14 08:41:52 -06:00
|
|
|
struct JnyBackend : public Backend {
|
|
|
|
JnyBackend() : Backend("jny", "generate design metadata") { }
|
2022-02-03 04:04:45 -06:00
|
|
|
void help() override {
|
2022-02-24 09:39:30 -06:00
|
|
|
// XXX(aki): TODO: explicitly document the JSON schema
|
2021-11-16 11:30:23 -06:00
|
|
|
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
|
|
|
|
log("\n");
|
2022-01-14 08:41:52 -06:00
|
|
|
log(" jny [options] [selection]\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
log("\n");
|
2022-02-10 10:34:43 -06:00
|
|
|
log(" -connections\n");
|
|
|
|
log(" Include connection information in the netlist output.\n");
|
|
|
|
log("\n");
|
|
|
|
log(" -attributes\n");
|
|
|
|
log(" Include attributed information in the netlist output.\n");
|
|
|
|
log("\n");
|
|
|
|
log(" -properties\n");
|
|
|
|
log(" Include property information in the netlist output.\n");
|
|
|
|
log("\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
log("Write a JSON metadata for the current design\n");
|
|
|
|
log("\n");
|
|
|
|
log("\n");
|
|
|
|
}
|
|
|
|
|
2022-02-03 04:04:45 -06:00
|
|
|
void execute(std::ostream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design) override {
|
2022-02-10 10:34:43 -06:00
|
|
|
|
|
|
|
bool connections{false};
|
|
|
|
bool attributes{false};
|
|
|
|
bool properties{false};
|
|
|
|
|
2021-11-16 11:30:23 -06:00
|
|
|
size_t argidx{1};
|
2022-02-10 10:34:43 -06:00
|
|
|
for (; argidx < args.size(); argidx++) {
|
|
|
|
if (args[argidx] == "-connections") {
|
|
|
|
connections = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args[argidx] == "-attributes") {
|
|
|
|
attributes = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args[argidx] == "-properties") {
|
|
|
|
properties = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
2021-11-16 11:30:23 -06:00
|
|
|
extra_args(f, filename, args, argidx);
|
|
|
|
|
2022-01-14 08:41:52 -06:00
|
|
|
log_header(design, "Executing jny backend.\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
JnyWriter jny_writer(*f, false, connections, attributes, properties);
|
2022-01-14 08:41:52 -06:00
|
|
|
jny_writer.write_metadata(design);
|
2021-11-16 11:30:23 -06:00
|
|
|
}
|
|
|
|
|
2022-01-14 08:41:52 -06:00
|
|
|
} JnyBackend;
|
2021-11-16 11:30:23 -06:00
|
|
|
|
|
|
|
|
2022-01-14 08:41:52 -06:00
|
|
|
struct JnyPass : public Pass {
|
|
|
|
JnyPass() : Pass("jny", "write design and metadata") { }
|
2021-11-16 11:30:23 -06:00
|
|
|
|
2022-02-03 04:04:45 -06:00
|
|
|
void help() override {
|
2021-11-16 11:30:23 -06:00
|
|
|
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
|
|
|
|
log("\n");
|
2022-01-14 08:41:52 -06:00
|
|
|
log(" jny [options] [selection]\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
log("\n");
|
2022-01-14 08:41:52 -06:00
|
|
|
log("Write a JSON netlist metadata for the current design\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
log("\n");
|
|
|
|
log(" -o <filename>\n");
|
|
|
|
log(" write to the specified file.\n");
|
|
|
|
log("\n");
|
2022-02-10 10:34:43 -06:00
|
|
|
log(" -connections\n");
|
|
|
|
log(" Include connection information in the netlist output.\n");
|
|
|
|
log("\n");
|
|
|
|
log(" -attributes\n");
|
|
|
|
log(" Include attributed information in the netlist output.\n");
|
|
|
|
log("\n");
|
|
|
|
log(" -properties\n");
|
|
|
|
log(" Include property information in the netlist output.\n");
|
|
|
|
log("\n");
|
2022-01-14 08:41:52 -06:00
|
|
|
log("See 'help write_jny' for a description of the JSON format used.\n");
|
2021-11-16 11:30:23 -06:00
|
|
|
log("\n");
|
|
|
|
}
|
2022-02-03 04:04:45 -06:00
|
|
|
void execute(std::vector<std::string> args, RTLIL::Design *design) override {
|
2021-11-16 11:30:23 -06:00
|
|
|
std::string filename{};
|
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
bool connections{false};
|
|
|
|
bool attributes{false};
|
|
|
|
bool properties{false};
|
|
|
|
|
|
|
|
size_t argidx{1};
|
|
|
|
for (; argidx < args.size(); argidx++) {
|
2021-11-16 11:30:23 -06:00
|
|
|
if (args[argidx] == "-o" && argidx+1 < args.size()) {
|
|
|
|
filename = args[++argidx];
|
|
|
|
continue;
|
|
|
|
}
|
2022-02-10 10:34:43 -06:00
|
|
|
|
|
|
|
if (args[argidx] == "-connections") {
|
|
|
|
connections = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args[argidx] == "-attributes") {
|
|
|
|
attributes = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (args[argidx] == "-properties") {
|
|
|
|
properties = true;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2021-11-16 11:30:23 -06:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
extra_args(args, argidx, design);
|
|
|
|
|
|
|
|
std::ostream *f;
|
|
|
|
std::stringstream buf;
|
|
|
|
|
|
|
|
if (!filename.empty()) {
|
|
|
|
rewrite_filename(filename);
|
|
|
|
std::ofstream *ff = new std::ofstream;
|
|
|
|
ff->open(filename.c_str(), std::ofstream::trunc);
|
|
|
|
if (ff->fail()) {
|
|
|
|
delete ff;
|
|
|
|
log_error("Can't open file `%s' for writing: %s\n", filename.c_str(), strerror(errno));
|
|
|
|
}
|
|
|
|
f = ff;
|
|
|
|
} else {
|
|
|
|
f = &buf;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2022-02-10 10:34:43 -06:00
|
|
|
JnyWriter jny_writer(*f, false, connections, attributes, properties);
|
2022-01-14 08:41:52 -06:00
|
|
|
jny_writer.write_metadata(design);
|
2021-11-16 11:30:23 -06:00
|
|
|
|
|
|
|
if (!filename.empty()) {
|
|
|
|
delete f;
|
|
|
|
} else {
|
|
|
|
log("%s", buf.str().c_str());
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-01-14 08:41:52 -06:00
|
|
|
} JnyPass;
|
2021-11-16 11:30:23 -06:00
|
|
|
|
|
|
|
PRIVATE_NAMESPACE_END
|