2019-04-19 13:23:09 -05:00
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read_verilog pmux2shiftx.v
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2019-06-27 13:02:52 -05:00
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design -save read
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hierarchy -top pmux2shiftx_test
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2019-04-19 13:23:09 -05:00
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prep
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design -save gold
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2019-04-19 19:03:44 -05:00
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pmux2shiftx -min_density 70
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2019-04-19 16:37:11 -05:00
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2019-04-19 13:23:09 -05:00
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opt
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2019-04-19 16:37:11 -05:00
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stat
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2019-04-19 13:23:09 -05:00
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# show -width
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select -assert-count 1 t:$sub
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2019-04-22 09:17:43 -05:00
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select -assert-count 1 t:$mux
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select -assert-count 1 t:$shift
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2019-04-19 16:37:11 -05:00
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select -assert-count 3 t:$shiftx
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2019-04-19 13:23:09 -05:00
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design -stash gate
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design -import gold -as gold
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design -import gate -as gate
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miter -equiv -flatten -make_assert -make_outputs gold gate miter
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sat -verify -prove-asserts -show-ports miter
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2019-06-27 13:02:52 -05:00
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#design -load gold
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#stat
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#
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#design -load gate
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#stat
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design -load read
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hierarchy -top issue01135
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proc
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pmux2shiftx -norange
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opt -full
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select -assert-count 0 t:$shift*
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select -assert-count 1 t:$pmux
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