mirror of https://github.com/YosysHQ/yosys.git
25 lines
443 B
Plaintext
25 lines
443 B
Plaintext
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read_verilog pmux2shiftx.v
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prep
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design -save gold
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pmux2shiftx
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opt
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# show -width
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select -assert-count 1 t:$mux
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select -assert-count 1 t:$shift
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select -assert-count 2 t:$shiftx
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select -assert-count 1 t:$sub
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design -stash gate
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design -import gold -as gold
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design -import gate -as gate
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miter -equiv -flatten -make_assert -make_outputs gold gate miter
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sat -verify -prove-asserts -show-ports miter
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design -load gold
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stat
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design -load gate
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stat
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