yosys/techlibs/nanoxplore/brams.txt

50 lines
831 B
Plaintext
Raw Normal View History

2024-03-13 12:19:41 -05:00
ram block $__NX_RAM_ {
2024-05-17 08:59:18 -05:00
option "STD_MODE" "NOECC_48kx1" {
# only 32k used
abits 15;
2024-05-28 07:21:36 -05:00
widths 1 per_port;
2024-05-17 08:59:18 -05:00
}
option "STD_MODE" "NOECC_24kx2" {
# only 16k used
abits 14;
2024-05-28 07:21:36 -05:00
widths 2 per_port;
2024-05-17 08:59:18 -05:00
}
ifndef IS_NG_MEDIUM {
option "STD_MODE" "NOECC_16kx3" {
abits 14;
widths 3 per_port;
}
2024-05-17 08:59:18 -05:00
}
option "STD_MODE" "NOECC_12kx4" {
# only 8k used
abits 13;
2024-05-28 07:21:36 -05:00
widths 4 per_port;
2024-05-17 08:59:18 -05:00
}
ifndef IS_NG_MEDIUM {
option "STD_MODE" "NOECC_8kx6" {
abits 13;
widths 6 per_port;
}
2024-05-17 08:59:18 -05:00
}
option "STD_MODE" "NOECC_6kx8" {
# only 4k used
abits 12;
2024-05-28 07:21:36 -05:00
widths 8 per_port;
2024-05-17 08:59:18 -05:00
}
option "STD_MODE" "NOECC_4kx12" {
abits 12;
2024-05-28 07:21:36 -05:00
widths 12 per_port;
2024-05-17 08:59:18 -05:00
}
option "STD_MODE" "NOECC_2kx24" {
abits 11;
2024-05-28 07:21:36 -05:00
widths 24 per_port;
2024-05-17 08:59:18 -05:00
}
2024-03-13 12:19:41 -05:00
cost 64;
init no_undef;
port srsw "A" "B" {
clock anyedge;
clken;
2024-05-17 08:59:18 -05:00
rdwr no_change;
rdinit none;
2024-03-13 12:19:41 -05:00
}
}