mirror of https://github.com/YosysHQ/yosys.git
41 lines
536 B
Plaintext
41 lines
536 B
Plaintext
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bram $__ICE40_RAM4K_M0
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init 0
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abits 8
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dbits 16
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groups 2
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ports 1 1
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wrmode 0 1
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enable 0 16
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transp 0 0
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clocks 2 3
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clkpol 2 3
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endbram
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bram $__ICE40_RAM4K_M123
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init 0
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abits 9 @M1
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dbits 8 @M1
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abits 10 @M2
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dbits 4 @M2
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abits 11 @M3
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dbits 2 @M3
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groups 2
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ports 1 1
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wrmode 0 1
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enable 0 1
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transp 0 0
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clocks 2 3
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clkpol 2 3
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endbram
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match $__ICE40_RAM4K_M0
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min efficiency 10
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make_transp
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or_next_if_better
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endmatch
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match $__ICE40_RAM4K_M123
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min efficiency 10
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make_transp
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endmatch
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