bram $__ICE40_RAM4K_M0
  init 0
  abits 8
  dbits 16
  groups 2
  ports  1  1
  wrmode 0  1
  enable 0 16
  transp 0  0
  clocks 2  3
  clkpol 2  3
endbram

bram $__ICE40_RAM4K_M123
  init 0
  abits  9 @M1
  dbits  8 @M1
  abits 10 @M2
  dbits  4 @M2
  abits 11 @M3
  dbits  2 @M3
  groups 2
  ports  1 1
  wrmode 0 1
  enable 0 1
  transp 0 0
  clocks 2 3
  clkpol 2 3
endbram

match $__ICE40_RAM4K_M0
  min efficiency 10
  make_transp
  or_next_if_better
endmatch

match $__ICE40_RAM4K_M123
  min efficiency 10
  make_transp
endmatch