skywater-pdk/docs/rules/gds_layers.csv

1	Layer name	Purpose	GDS layer:datatype	Description
2	diff	drawing, text	65:20	Active (diffusion) area (type opposite of well/substrate underneath)
3	tap	drawing	65:44	Active (diffusion) area (type equal to the well/substrate underneath) (i.e., N+ and P+)
4	nwell	drawing	64:20	N-well region
5	dnwell	drawing	64:18	Deep n-well region
6	pwbm	drawing	19:44	Regions (in UHVI) blocked from p-well implant (DE MOS devices only)
7	pwde	drawing	124:20	Regions to receive p-well drain-extended implants
8	hvtr	drawing	18:20	High-Vt RF transistor implant
9	hvtp	drawing	78:44	High-Vt LVPMOS implant
10	ldntm	drawing	11:44	N-tip implant on SONOS devices
11	hvi	drawing	75:20	High voltage (5.0V) thick oxide gate regions
12	tunm	drawing	80:20	SONOS device tunnel implant
13	lvtn	drawing	125:44	Low-Vt NMOS device
14	poly	drawing, text	66:20	Polysilicon
15	hvntm	drawing	125:20	High voltage N-tip implant
16	nsdm	drawing	93:44	N+ source/drain implant
17	psdm	drawing	94:20	P+ source/drain implant
18	rpm	drawing	86:20	300 ohms/square polysilicon resistor implant
19	urpm	drawing	79:20	2000 ohms/square polysilicon resistor implant
20	npc	drawing	95:20	Nitride poly cut (under licon1 areas)
21	licon1	drawing	66:44	Contact to local interconnect
22	li1	drawing, text	67:20	Local interconnect
23	mcon	drawing	67:44	Contact from local interconnect to metal1
24	met1	drawing, text	68:20	Metal 1
25	via	drawing	68:44	Contact from metal 1 to metal 2
26	met2	drawing, text	69:20	Metal 2
27	via2	drawing	69:44	Contact from metal 2 to metal 3
28	met3	drawing, text	70:20	Metal 3
29	via3	drawing	70:44	Contact from metal 3 to metal 4
30	met4	drawing, text	71:20	Metal 4
31	via4	drawing	71:44	Contact from metal 4 to metal 5
32	met5	drawing, text	72:20	Metal 5
33	pad	drawing, text	76:20	Passivation cut (opening over pads)
34	nsm	drawing	61:20	Nitride seal mask
35	capm	drawing	89:44	MiM capacitor plate over metal 3
36	cap2m	drawing	97:44	MiM capacitor plate over metal 4
37	vhvi	drawing	74:21	12V nominal (16V max) node identifier
38	uhvi	drawing	74:22	20V nominal node identifier
39	npn	drawing	82:20	Base region identifier for NPN devices
40	inductor	drawing	82:24	Identifier for inductor regions
41	capacitor	drawing	82:64	Identifier for interdigitated (vertical parallel plate (vpp)) capacitors
42	pnp	drawing	82:44	Base nwell region identifier for PNP devices
43	LVS prune	drawing	84:44	Exemption from LVS check (used in e-test modules only)
44	ncm	drawing	92:44	N-core implant
45	padCenter	drawing	81:20	Pad center marker
46	target	drawing	76:44	Metal fuse target
47
48	areaid.sl	identifier	81:1	Seal ring identifier
49	areaid.ce	identifier	81:2	Memory (SRAM) core cell identifier
50	areaid.fe	identifier	81:3	Pads in padframe identifier
51	areaid.sc	identifier	81:4	Standard cell identifier
52	areaid.sf	identifier	81:6	Signal pad diffusion identifier (for latchup DRC checks)
53	areaid.sl	identifier	81:7	Signal pad well identifier (for latchup DRC checks)
54	areaid.sr	identifier	81:8	Signal pad metal (for latchup DRC checks)
55	areaid.mt	identifier	81:10	Location of e-test modules within the frame
56	areaid.dt	identifier	81:11	Location of dice within the frame
57	areaid.ft	identifier	81:12	Boundary of the frame
58	areaid.ww	identifier	81:13	Waffle window (used to prevent waffle shifting)
59	areaid.ld	identifier	81:14	Low tap density (15um between taps) area. Must be at least 50um from padframe
60	areaid.ns	identifier	81:15	Non-critical side. Blocks stress DRC rules
61	areaid.ij	identifier	81:17	Identification for areas susceptible to injection
62	areaid.zr	identifier	81:18	Zener diode identifier
63	areaid.ed	identifier	81:19	ESD device identifier
64	areaid.de	identifier	81:23	Diode identifier
65	areaid.rd	identifier	81:24	RDL probe pad (not used in this process)
66	areaid.dn	identifier	81:50	Dead zone (used in seal ring only for stress DRC)
67	areaid.cr	identifier	81:51	Critical corner (used in seal ring only for stress DRC)
68	areaid.cd	identifier	81:52	Critical side (used in seal ring only for stress DRC)
69	areaid.st	identifier	81:53	Substrate cut. Idendifies areas to be considered as isolated substrate
70	areaid.op	identifier	81:54	OPC drop. Block automatic OPC (for fab blocks and lithocal structures)
71	areaid.en	identifier	81:57	Extended drain identifier
72	areaid.en20	identifier	81:58	20V Extended drain identifier
73	areaid.le	identifier	81:60	3.3V native NMOS identifier (absence indicates a 5V native NMOS)
74	areaid.hl	identifier	81:63	HV nwell. Identifies nwells with thin oxide devices connected to high voltage
75	areaid.sd	identifier	81:70	subcircuit identifier (for LVS extraction)
76	areaid.po	identifier	81:81	Photodiode device identifier
77	areaid.it	identifier	81:84	IP exempt from DFM rules
78	areaid.et	identifier	81:101	e-test module identifier
79	areaid.lvt	identifier	81:108	Low-Vt identifier
80	areaid.re	identifier	81:125	RF diode identifier
81
82	fom	dummy	22:23
83
84	poly	gate	66:9
85
86	poly	model	66:83	(Text type)
87
88	poly	resistor	66:13
89	diff	resistor	65:13
90	pwell	resistor	64:13
91	li1	resistor	67:13
92
93	diff	high voltage	65:8
94
95	met4	fuse	71:17
96
97	inductor	terminal1	82:26
98	inductor	terminal2	82:27
99	inductor	terminal3	82:28
100
101	li1	block	67:10
102	met1	block	68:10
103	met2	block	69:10
104	met3	block	70:10
105	met4	block	71:10
106	met5	block	72:10
107
108	prBndry	boundary	235:4
109	diff	boundary	65:4
110	tap	boundary	65:60
111	mcon	boundary	67:60
112	poly	boundary	66:4
113	via	boundary	68:60
114	via2	boundary	69:60
115	via3	boundary	70:60
116	via4	boundary	71:60
117
118	li1	label	67:5	(Text type)
119	met1	label	68:5	(Text type)
120	met2	label	69:5	(Text type)
121	met3	label	70:5	(Text type)
122	met4	label	71:5	(Text type)
123	met5	label	72:5	(Text type)
124	poly	label	66:5	(Text type)
125	diff	label	65:6	(Text type)
126	pwell	label	64:59	(Text and data type)
127	pwelliso	label	44:5	(Text type)
128	pad	label	76:5	(Text type)
129	tap	label	65:5
130	nwell	label	64:5
131	inductor	label	82:25
132
133	text	label	83:44	(Text type)
134
135	li1	net	67:23	(Text type)
136	met1	net	68:23	(Text type)
137	met2	net	69:23	(Text type)
138	met3	net	70:23	(Text type)
139	met4	net	71:23	(Text type)
140	met5	net	72:23	(Text type)
141	poly	net	66:23	(Text type)
142	diff	net	65:23	(Text type)
143
144	li1	pin	67:16	(Text and data)
145	met1	pin	68:16	(Text and data)
146	met2	pin	69:16	(Text and data)
147	met3	pin	70:16	(Text and data)
148	met4	pin	71:16	(Text and data)
149	met5	pin	72:16	(Text and data)
150	poly	pin	66:16	(Text and data)
151	diff	pin	65:16	(Text and data)
152	nwell	pin	64:16	(Text type)
153	pad	pin	76:16	(Text and data)
154	pwell	pin	122:16	(Text and data)
155	pwelliso	pin	44:16	(Text and data)
156
157	nwell	pin	64:0	(Text type)
158	poly	pin	66:0	(Text type)
159	li1	pin	67:0	(Text type)
160	met1	pin	68:0	(Text type)
161	met2	pin	69:0	(Text type)
162	met3	pin	70:0	(Text type)
163	met4	pin	71:0	(Text type)
164	met5	pin	72:0	(Text type)
165	pad	pin	76:0	(Text type)
166	pwell	pin	122:0	(Text type)
167
168	diff	cut	65:14
169	poly	cut	66:14
170	li1	cut	67:14
171	met1	cut	68:14
172	met2	cut	69:14
173	met3	cut	70:14
174	met4	cut	71:14
175	met5	cut	72:14
176	pwell	cut
177
178	met5	probe	72:25
179	met4	probe	71:25
180	met3	probe	70:25
181	met2	probe	69:25
182	met1	probe	68:25
183	li1	probe	67:25
184	poly	probe	66:25
185
186	poly	short	66:15
187	li1	short	67:15
188	met1	short	68:15
189	met2	short	69:15
190	met3	short	70:15
191	met4	short	71:15
192	met5	short	72:15
193
194	Mask level data
195
196	cncm	mask	17:0	N-core implant mask
197	crpm	mask	96:0	Resistor Protect mask
198	cpdm	mask	37:0	Pad mask
199	cnsm	mask	22:0	Nitride seal mask
200	cmm5	mask	59:0	Metal 5 mask
201	cviam4	mask	58:0	Via 4 mask
202	cmm4	mask	51:0	Metal 4 mask
203	cviam3	mask	50:0	Via 3 mask
204	cmm3	mask	34:0	Metal 3 mask
205	cviam2	mask	44:0	Via 2 mask
206	cmm2	mask	41:0	Metal 2 mask
207	cviam	mask	40:0	Via mask
208	cmm1	mask	36:0	Metal 1 mask
209	ctm1	mask	35:0	Contact mask
210	cli1m	mask	56:0	Local interconnect mask
211	clicm1	mask	43:0	Local interconnect contact mask
212	cpsdm	mask	32:0	P+ Implant mask
213	cnsdm	mask	30:0	N+ Implant mask
214	cldntm	mask	11:0	Lightly-doped N-tip implant mask
215	cnpc	mask	49:0	Nitride poly cut mask
216	chvntm	mask	39:0	High voltage N-tip implant mask
217	cntm	mask	27:0	N-tip implant mask
218	cp1m	mask	28:0	Poly 1 mask
219	clvom	mask	46:0	Low Voltage oxide mask
220	conom	mask	88:0	ONO Mask
221	ctunm	mask	20:0	Tunnel mask
222	chvtrm	mask	98:0	HLow VT PCh Radio mask
223	chvtpm	mask	97:0	High Vt Pch mask
224	clvtnm	mask	25:0	Low Vt Nch mask
225	cnwm	mask	21:0	Nwell mask
226	cdnm	mask	48:0	Deep nwell mask
227	cfom	mask	23:0	Field oxide mask
228
229	cfom	drawing	22:20
230	clvtnm	drawing	25:44
231	chvtpm	drawing	88:44
232	conom	drawing	87:44
233	clvom	drawing	45:20
234	cntm	drawing	26:20
235	chvntm	drawing	38:20
236	cnpc	drawing	44:20
237	cnsdm	drawing	29:20
238	cpsdm	drawing	31:20
239	cli1m	drawing	115:44
240	cviam3	drawing	112:20
241	cviam4	drawing	117:20
242	cncm	drawing	96:44
243
244	cntm	mask add	26:21
245	clvtnm	mask add	25:43
246	chvtpm	mask add	97:43
247	cli1m	mask add	115:43
248	clicm1	mask add	106:43
249	cpsdm	mask add	31:21
250	cnsdm	mask add	29:21
251	cp1m	mask add	33:43
252	cfom	mask add	22:21
253
254	cntm	mask drop	26:22
255	clvtnm	mask drop	25:42
256	chvtpm	mask drop	97:42
257	cli1m	mask drop	115:42
258	clicm1	mask drop	106:42
259	cpsdm	mask drop	31:22
260	cnsdm	mask drop	29:22
261	cp1m	mask drop	33:42
262	cfom	mask drop	22:22
263
264	cmm4	waffle drop	112:4
265	cmm3	waffle drop	107:24
266	cmm2	waffle drop	105:52
267	cmm1	waffle drop	62:24
268	cp1m	waffle drop	33:24
269	cfom	waffle drop	22:24
270	cmm5	waffle drop	117:4