skywater-pdk/docs/rules/layers/table-f2b-mask.tsv

13 KiB

1Category Name Used?Layout Model and required schematic elementFOMDNMPWBMPWDEMNWMHVTPMLVTNMNCMTUNMONOMLVOMRPMP1MHVNTMNTMLDNTMNPCNSDMPSDMLICM1LI1MCAPMMM1MM2MM3MM5CU1MINDMDrawn Route / Comments
2RESISTOR metal fuse_D mrmX mrmX -+---------+---++++--+++C+++metX AND metX.fe
3RESISTOR metal fuse_T mrmX mrmX -+---------+---++++--++C++++metX AND metX.fe
4PNP Parasitic PNP pnp4 pnppar C---CC-C---+--C-+CC+++++++++Layout provided by technology
5PNP Parasitic NPN pnp4 npnpar CC--C+-----+----+CC+++++++++Layout provided by technology
6ESD transistor LV nESD transistor nfet nshortesd C+----------C----C-+++++++++NMOS with ESD_nwell_tap
7ESD transistor HV nESD transistor nfet nhvesd C+--------C-CCC--C-+++++++++NMOS with ESD_nwell_tap