44 lines
1.1 KiB
ReStructuredText
44 lines
1.1 KiB
ReStructuredText
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1.8V low-VT PMOS FET
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--------------------
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Spice Model Information
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~~~~~~~~~~~~~~~~~~~~~~~
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- Cell Name: :cell:`sky130_fd_pr__pfet_01v8`
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- Model Name: :model:`sky130_fd_pr__pfet_01v8_lvt`
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Operating Voltages where SPICE models are valid
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- V\ :sub:`DS` = 0 to -1.95V
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- V\ :sub:`GS` = 0 to -1.95V
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- V\ :sub:`BS` = -0.1 to +1.95V
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Details
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~~~~~~~
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Major model output parameters are shown below and compared against the EDR (e-test) specs
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.. include:: pfet_01v8_lvt-table0.rst
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Inverter Gate Delays using sky130_fd_pr__nfet_01v8_lvt/:model:`sky130_fd_pr__pfet_01v8_lvt` device combinations:
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.. include:: pfet_01v8_lvt-table1.rst
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The symbol of the :model:`sky130_fd_pr__pfet_01v8_lvt` (1.8V low-VT PMOS FET) is shown below:
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|symbol-pfet_01v8_lvt|
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The cross-section of the low-VT PMOS FET is shown below. The cross-section is identical to the std PMOS FET except for the V\ :sub:`T` adjust implants (to achieve the lower V\ :sub:`T`)
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|cross-section-pfet_01v8_lvt|
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.. |symbol-pfet_01v8_lvt| image:: symbol-pfet_01v8_lvt.svg
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.. |cross-section-pfet_01v8_lvt| image:: cross-section-pfet_01v8_lvt.svg
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