Jean-Paul Chaput 59c0ab067b Mangle the "'" in Verilog to VHDL translator.		2022-05-12 17:52:22 +02:00
..
cmake_modules	include/coriolis -> include/coriolis2	2021-08-27 16:15:28 +00:00
doc	Update documentation (by mistake, nothing new).	2021-11-21 23:40:40 +01:00
etc	Set the a default pixel threshold in CRL/etc/commons.display.	2021-11-26 11:32:33 +01:00
python	Adapt Nix code to Python 3 switch.	2021-10-26 20:10:59 +00:00
src	Mangle the "'" in Verilog to VHDL translator.	2022-05-12 17:52:22 +02:00
CMakeLists.txt	Fix library linking problem for gcc 9 and above (Ubuntu 20/Debian 11).	2021-11-22 00:05:48 +01:00