198 lines
4.1 KiB
Plaintext
198 lines
4.1 KiB
Plaintext
--
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-- Generated by VASY
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--
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ENTITY coeur IS
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PORT(
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a_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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b_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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cin_from_pads : IN BIT;
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ck : IN BIT;
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cout_to_pads : OUT BIT;
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d_from_pads : IN BIT_VECTOR(3 DOWNTO 0);
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i_from_pads : IN BIT_VECTOR(8 DOWNTO 0);
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ng_to_pads : OUT BIT;
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noe_from_pads : IN BIT;
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np_to_pads : OUT BIT;
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ovr_to_pads : OUT BIT;
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q0_from_pads : IN BIT;
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q0_to_pads : OUT BIT;
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q3_from_pads : IN BIT;
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q3_to_pads : OUT BIT;
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r0_from_pads : IN BIT;
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r0_to_pads : OUT BIT;
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r3_from_pads : IN BIT;
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r3_to_pads : OUT BIT;
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shift_l : OUT BIT;
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shift_r : OUT BIT;
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f3_to_pads : OUT BIT;
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vdd : IN BIT;
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vss : IN BIT;
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y_oe : OUT BIT;
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y_to_pads : OUT BIT_VECTOR(3 DOWNTO 0);
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zero_to_pads : OUT BIT
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);
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END coeur;
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ARCHITECTURE VST OF coeur IS
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SIGNAL alu_out : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL r : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL ra : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL rb : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL s : BIT_VECTOR(3 DOWNTO 0);
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SIGNAL saccu : BIT_VECTOR(3 DOWNTO 0);
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COMPONENT muxs
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PORT(
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alu_out : IN BIT_VECTOR(3 DOWNTO 0);
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i : IN BIT_VECTOR(2 DOWNTO 0);
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noe : IN BIT;
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oe : OUT BIT;
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ra : IN BIT_VECTOR(3 DOWNTO 0);
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shift_l : OUT BIT;
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shift_r : OUT BIT;
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vdd : IN BIT;
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vss : IN BIT;
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y : OUT BIT_VECTOR(3 DOWNTO 0)
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);
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END COMPONENT;
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COMPONENT alu
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PORT(
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alu_out : INOUT BIT_VECTOR(3 DOWNTO 0);
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cin : IN BIT;
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cout : OUT BIT;
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i : IN BIT_VECTOR(2 DOWNTO 0);
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ng : OUT BIT;
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np : OUT BIT;
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ovr : OUT BIT;
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r : IN BIT_VECTOR(3 DOWNTO 0);
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s : IN BIT_VECTOR(3 DOWNTO 0);
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f3 : OUT BIT;
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vdd : IN BIT;
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vss : IN BIT;
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zero : OUT BIT
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);
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END COMPONENT;
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COMPONENT accu
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PORT(
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accu : INOUT BIT_VECTOR(3 DOWNTO 0);
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alu_out : IN BIT_VECTOR(3 DOWNTO 0);
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cke : IN BIT;
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i : IN BIT_VECTOR(2 DOWNTO 0);
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q0_from : IN BIT;
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q0_to : OUT BIT;
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q3_from : IN BIT;
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q3_to : OUT BIT;
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vdd : IN BIT;
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vss : IN BIT
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);
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END COMPONENT;
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COMPONENT ram
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PORT(
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a : IN BIT_VECTOR(3 DOWNTO 0);
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alu_out : IN BIT_VECTOR(3 DOWNTO 0);
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b : IN BIT_VECTOR(3 DOWNTO 0);
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clk : IN BIT;
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i : IN BIT_VECTOR(2 DOWNTO 0);
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r0_from_pads : IN BIT;
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r0_to_pads : OUT BIT;
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r3_from_pads : IN BIT;
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r3_to_pads : OUT BIT;
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ra : OUT BIT_VECTOR(3 DOWNTO 0);
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rb : OUT BIT_VECTOR(3 DOWNTO 0);
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vdd : IN BIT;
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vss : IN BIT
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);
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END COMPONENT;
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COMPONENT muxe
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PORT(
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accu : IN BIT_VECTOR(3 DOWNTO 0);
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d : IN BIT_VECTOR(3 DOWNTO 0);
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i : IN BIT_VECTOR(2 DOWNTO 0);
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r : OUT BIT_VECTOR(3 DOWNTO 0);
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ra : IN BIT_VECTOR(3 DOWNTO 0);
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rb : IN BIT_VECTOR(3 DOWNTO 0);
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s : OUT BIT_VECTOR(3 DOWNTO 0);
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vdd : IN BIT;
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vss : IN BIT
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);
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END COMPONENT;
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BEGIN
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iram : ram
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PORT MAP (
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a(3 downto 0) => a_from_pads,
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alu_out => alu_out,
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b(3 downto 0) => b_from_pads,
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i(2 downto 0) => i_from_pads(8 downto 6),
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ra => ra,
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rb => rb,
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vss => vss,
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vdd => vdd,
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r3_to_pads => r3_to_pads,
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r3_from_pads => r3_from_pads,
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r0_to_pads => r0_to_pads,
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r0_from_pads => r0_from_pads,
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clk => ck
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);
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iaccu : accu
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PORT MAP (
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accu(3 downto 0) => saccu,
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alu_out => alu_out,
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i(2 downto 0) => i_from_pads(8 downto 6),
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vss => vss,
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vdd => vdd,
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q3_to => q3_to_pads,
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q3_from => q3_from_pads,
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q0_to => q0_to_pads,
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q0_from => q0_from_pads,
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cke => ck
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);
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ialu : alu
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PORT MAP (
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alu_out => alu_out,
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i(2 downto 0) => i_from_pads(5 downto 3),
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r => r,
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s => s,
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zero => zero_to_pads,
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vss => vss,
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vdd => vdd,
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f3 => f3_to_pads,
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ovr => ovr_to_pads,
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np => np_to_pads,
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ng => ng_to_pads,
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cout => cout_to_pads,
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cin => cin_from_pads
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);
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imuxs : muxs
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PORT MAP (
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alu_out => alu_out,
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i(2 downto 0) => i_from_pads(8 downto 6),
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ra => ra,
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y(3 downto 0) => y_to_pads,
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vss => vss,
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vdd => vdd,
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shift_r => shift_r,
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shift_l => shift_l,
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oe => y_oe,
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noe => noe_from_pads
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);
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imuxe : muxe
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PORT MAP (
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accu(3 downto 0) => saccu,
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d(3 downto 0) => d_from_pads,
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i(2 downto 0) => i_from_pads(2 downto 0),
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r => r,
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ra => ra,
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rb => rb,
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s => s,
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vss => vss,
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vdd => vdd
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);
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END VST;
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