coriolis/crlcore/src
Jean-Paul Chaput 91f973c00f Improve the management of the I/O pad near the chip corner.
* Bug: In cumulus/plugins/PadsCorona.py, when a pad is at the beginning
    or at the end of the side, the pad corona terminal may be outside
    the corona range (not directly facing it). In that case, create a
    bend to reach it.
      Worse, in some case more than one (but likely no more), could be
    in that case, so not only do we create a bend but also make a
    shift in the bended segment so two consecutive ones are not on the
    same axis, causing shorts.
      If both end pads of a corner are in that case, we cannot prevent
    a short, so at least, issue a warning.
* Bug: In CRL::Vhdl, the Entity::VstUseConcat was not passed correctly
    along, so we did get a strange mix of conat and direct assignment.
* New: In Unicorn/cgt.py : added --vst-use-concat options to control
    the VST driver behavior.
2019-08-16 00:40:49 +02:00
..
LibraryManager Bug fixes in Blif parser (no VHDL enforcement) & GDS driver. 2019-03-07 20:14:08 +01:00
ccore Improve the management of the I/O pad near the chip corner. 2019-08-16 00:40:49 +02:00
cyclop First step in supporting ISPD18 detailed routing benchmarks. 2019-03-29 11:07:55 +01:00
fonts * ./hurricane/src/hviewer, 2010-03-09 15:20:13 +00:00
pyCRL Improve the management of the I/O pad near the chip corner. 2019-08-16 00:40:49 +02:00
x2y Diplay function, file & line number in the backtrace (like gdb). 2016-08-06 18:15:06 +02:00
CMakeLists.txt New Library Manager Widget. Access with Tools menu or CTRL+M. 2015-05-09 17:03:17 +02:00