Commit Graph

242 Commits

Author SHA1 Message Date
Jean-Paul Chaput 1b7bd9de36 Happy new year 2016! 2016-01-21 00:41:19 +01:00
Jean-Paul Chaput 5baddeb558 Implementation of DataBase native save/restore in JSON (step 2).
* New: In boostrap, in ccb.py, added support for the "support" project
    which contains external dependencies. Currently contains only
    RapidJSON. Those dependencies must be cloned here manually.
* New: In Hurricane, Initializer class for an ordered static initialization
    across different compilation modules.
* Change: In Hurricane, at DataBase level, no longer save the Cells in
    the libraries, but create and ordered list of Cell. Deepest cells
    (leaf cells) first. To avoid dependency problems.
* New: In Hurricane, JSON support for Property.
* New; In CRL, added JSON support for AllianceFramework, Environement &
    Catalog and their associated properties. Adjustment of the
    AllianceLibrary creation policy.
2016-01-21 00:25:39 +01:00
Jean-Paul Chaput f537a10d45 Implementation of DataBase native save/restore in JSON (step 1).
* New: In Hurricane, added first support for DataBase native import/export
    using JSON.
      We choose RapidJSON, in SAX mode, to manage the JSON format low level
    Read/Write. Thus, it's Git repository http://github.com/miloyip/rapidjson
    must be added under ~/coriolis-2.x/src and manually build and installed
    in the Coriolis installation tree (to be integrated in ccb later).
      Two mode are being supported:
        1. Cell mode: one Cell only is saved. In that mode, Entities
           referred by Occurrences are "outside" the file. They are coded
           through their "signature" (mostly, all the values of their
           attributes). The ids saved in the file cannot be restored
           identically as we cannot predict when and in which context the
           Cell will be reloaded.
        2. Design Blob mode: the whole design hierarchy, down and including
           the standard cells is saved. This way the design is completly
           self contained and Entities ared referred through their ids.
           A design blob can only be loaded immediatly after starting cgt
           as the DataBase *must* be empty. This way we restore the whole
           design hierarchy with *exactly* the same ids.
      Now, Hurricane object should provide a "toJson()" method for driving
    JSON, and be associated with a JsonObject derived class for parsing.
* New: In Hurricane, ability to force the next id that will be used for a
    DBo (used by Design Blob Mode).
* New: In Hurricane, in DataBase, added getCell() and getLibrary() functions
    to allow the hierarchical access of a Cell/Library in native mode
    (i.e. whithout the requirement of AllianceFramework).
* New: In Hurricane, In CellViewer, added menu entry for Save/Load of
    JSON Design Blobs. Added at this level because we consider it as the
    "native" format of Hurricane.
* New: In Unicorn, added support of import/export of JSON Cell.
* Bug: In Hurricane, in Instance, when cloning an Instance or uniquifying
    it's master Cell, we forgot about the Occurrences (through shared pathes).
    When an instance is cloned the Shared pathes still points toward the
    original Instance. And when it's the master Cell that is uniquifyed
    it's the Entities pointed to that remains in the original Cell.
    This is a software design problem. It is difficult to define what
    policy to adopt when uniquifying: basically that means that one
    Occurence is either moved onto the clone or duplicated. Furthermore,
    it is not trivial to known what Occurrence is pointing on the
    uniquifyed/cloned item. Have to think about it a little more.
* Bug: In Etesian, in EtesianEngine, build the flattened nets and their
    RoutingPads *after* uniquifying (through slaving bounding boxes).
    This way we avoid the Occurrences problem described above.
* Bug: In Etesian, in EtesianEngine, invalidate the RoutingPad after
    processing the placement so they are put into the right quadtree.
    This problem is due to the fact that the RoutingPads do not belong
    to the Instance that they refer. And when this instance is moved
    around, she doesn't inform the RoutingPad that is has moved.
    More software architecture design to review...
2016-01-07 13:15:33 +01:00
Jean-Paul Chaput 1adefabb2f Correctly remove VHDL Entity and Bit properties.
* Bug: In CRL Core, in Vst driver, remove VhdlEntity (from Cell) and
    BitProperty/Bit (from Net) with the property remove and not the
    destroy() method. The BitProperty removal was completly forgotten
    leading to the use of removed Signals when doing multiple saves
    (hence core-dump).
* Change: In CRL Core, in Vst driver, never save as Signals the DeepNets
    as they are created by a virtual flatten and do not connect any
    instances at top level. Note that they will exists in the physical
    file if routing layout has been created.
2015-09-06 17:24:04 +02:00
Jean-Paul Chaput ed557d9027 Added support for "same layer" dogleg. Big fix for pad routing.
* Change: In Knik, in Vertex, add a "blocked" flag to signal disabled
    vertexes in the grid (must not be used by the global router).
      Modificate the Graph::getVertex() method so that when a vertex
    is geometrically queried, if is a blocked one, return a non-blocked
    neighbor. This mechanism is introduced to, at last, prevent the
    global router to go *under* the pad in case of a commplete chip.
* New: In Katabatic, in AutoSegment, a new state has been added: "reduced".
    A reduced segment is in the same layer as it's perpandiculars.
    To be reduced, a segments has to be connected on source & target to
    AutoContactTurn, both of the perpandiculars must be of the same layer
    (below or above) and it's length must not exceed one pitch in the
    perpandicular direction.
      To reduce an AutoSegment, call ::reduce() and to revert the state,
    call ::raise(). Two associated predicates are associated:
    ::canReduce() and ::mustRaise().
      Note: No two adjacent segments can be reduced at the same time.
* Bug: In Katabatic, in GCellTopology, add a new method ::doRp_AccessPad()
    to connect to the pads. Create wiring, fixed and non managed by
    Katabatic, to connect the pad connector layer to the lowest routing
    layers (depth 1 & 2). The former implementation was sometimes leading
    to gaps (sheared contact) that *must not* occurs during the building
    stage.
      Remark: This bug did put under the light the fact that the initial
    wiring must be created without gaps. Gaps are closed by making doglegs
    on contacts. But this mechanism could only work when the database if
    fully initialised (the cache is up to date). Otherwise various problems
    arise, in the canonization process for example.
* New: In Katabatic, in AutoContactTerminal::getNativeConstraintBox(),
    when anchored on a RoutingPad, now take account the potential rotation
    of the Path's transformation. Here again, for the chip's pads.
* New: In Kite, support for reduced AutoSegment. TrackSegment associateds
    to reduced AutoSegment are *not* inserted into track to become
    effectively invisibles. When a segment becomes reduced, a TrackEvent
    is generated to remove it. Conversely when it is raised a RoutingEvent
    is created/rescheduled to insert it. All this is mostly managed inside
    the Session::revalidate() method.
* New: In Kite, in KiteEngine::createGlobalGraph(), in case of a chip,
    mark all global routing vertexes (Knik) that are under a pad, as blockeds.
* Bug: In Cumulus, in PadsCorona.Side.getAxis(), inversion between X and
    Y coordinate of the chip size. Did not show until a non-square chip
    was routed (i.e. our MIPS R3000).
* Change: In Stratus1, in st_placement.py add the ClockBuffer class for
    backward compatibility with the MIPS32 bench. Have to review this
    functionnality coming from the deprecated placeAndroute.py.
      In st_instance.py, no longer creates the Plug ring of a Net.
    In my opinion it just clutter the display until the P&R is called.
    Can re-enable later as an option (in Unicorn).
* Change: In Unicorn, in cgt.py, more reliable way of loading then running
    user supplied scripts. Borrowed from alliance-checker-toolkit doChip.py	.
2015-08-16 23:29:28 +02:00
Jean-Paul Chaput ff69a2ef74 Added Hierarchy browser to the Controller.
* New: In Hurricane, added hierarchy browser in the controller.
    The hierarchy is presented as a tree. New MVC, HierarchyInformations,
    HierarchyModel and HierarchyBrowser.
      When using a data model which is not directly connect inside the
    model, we must use the internalPointer field of the QModelIndex.
    But this field is also used by the QSortFilterproxymodel, this
    prevent using it with a Tree model.
      The filter is directly implemented and is specific to each
    Instance entry.
* Change: In CellWidget & CellWidget::State, now store the Cell and
    a Path, this way we can keep track of the hierarchy when browsing.
    The Path is in the State and so propagated back to the Controller.
* Change: In HierarchyCommand, use the Path with setCell().
2015-07-23 00:44:56 +02:00
Jean-Paul Chaput ae6eeb8f56 Merged QuadTrees in overlayed Cells (placed together).
* New: In Hurricane, in Cell & Instance, add the ability to merge the
    QuadTree when *second level* instances of a Cell are placed in
    the same space as the top Cell. This is the case of a deeply
    hierarchical design made of only standard cells that are to
    be placed in a "flat" manner.
      The design is uniquified then the intermediate instances models,
    which should be unique at that point have their QuadTree merged
    through a call to Instance::slaveAbutmentBox(). That method will
    make the model of the instance use the QuadTree of the Cell to
    which the instance belong. The instance model no longer posseses
    a dedicated QuadTree. As a corollary the abutment box of both
    Cell are kept identical and the Instance has it's transformation
    set to (0,0,ID).
      Remark: when we talk about "QuadTree", we mean in fact the
    QuadTree for the instances *and* the SliceMap (Layer+QuadTree).
      Consequence in Query: when going through the resulting
    "flattened" QuadTree we will find objects with an incomplete
    Path du to the fact that we didn't have to explore their
    Instance/Cell level to reach them. The shunted part of the
    Path is stored in the Go master Cell in the _shuntedPath
    attribute. This also affect the displayed depth of hierarchy,
    but not too badly.
* New: In Hurricane, in Cell, new methods:
    - Cell::updatePlacedFlag() : set the placement flags.
    - Cell::isUnique() : one or less instance.
    - Cell::isUniquified() : is the result of an uniquification.
    - Cell::isUniquifyMaster() : is the reference cell of the
    uniquification.
* Change: In Hurricane, in Cell::Uniquify(), uniquify a Cell only
    if it is unplaced. We do not need to duplicate placed Cells
    (see datapathes).
2015-06-26 18:35:11 +02:00
Jean-Paul Chaput fcb4acadad Improvements & bugs corrections in the LEF/DEF importer/exporter.
* Bug: In Hurricane, In NetAlias::removeAlias(), perform the isMaster()
    check on the *current* hook, not the *this* one... Was preventing the
    removal of most aliases.
* New: In CRL Core, in DefExport, perform a virtual flatten before exporting
    a design. Replace the hard-wired "sxlib" gauge by the current default
    one. More secure management of flattened instance and net names (removal
    of all potentially special characters). In net names, correct management
    of vectorized names (do not systematically add "_net" at the end).
      In DefImport, manage the BUSBITS property and revectorize accordingly
    the net names. When loading nets, systematically remove the alias of
    the temporary net "__prebuild__" (a bug in NetAlias was preventing it).
      In LefExport, the right value of MANUFACTURINGGRID in pseudo symbolic
    mode is 0.5 (expressed in lamba). That way all length are even multiples
    of it. Note that there is still the order bug of the 5.7 drivers that
    puts that entry *before* UNITS in the LEF file (bad bad Cadence).
2015-06-18 15:12:01 +02:00
Jean-Paul Chaput d769fafe92 Forgotten files for ST CMOS065 techno (real). 2015-06-12 17:58:30 +02:00
Jean-Paul Chaput e2fcfcb699 Rationalization of Cell's flags. Compilation warnings hunt.
* New: In Hurricane, dedicated class BaseFlags to wrap a set of flags.
    Similar to the Mask class, only with a slightly different semantic.
    Encapsulation of <unsigned int>.
      Also provide support for the Inspector, to have a human-readable
    display of the flags.
* Change: In Hurricane, in Cell, regroup all the flags under a Flags
    sub-class of Cell. No more mixing between booleans and bit flags.
    (first use of BaseClass).
* In Hurricane, CRL Core & Knik, many small corrections to suppress
    annoying warning messages at compile time.
      Most noticeably, Bison errors in VstParserGrammar generated by
    rules and token with mismatched return value type. This was not
    problematic because the badly defined return value where not used.
    But still...
2015-06-10 15:49:58 +02:00
Jean-Paul Chaput 701487247d Bug in VHDL portmap. Too strict checking in Kite & Etesian ::setViewer().
* Bug: In CRL Core, in VectorPortMap::VhdlPortMap(), if the connection
    was made to *non-contiguous* bits of an otherwise *contiguous* vector,
    it was using a span instead of the separate bits. Now check that
    bits are contiguous (delta: +1/-1) and the delta do not change of
    sign.
* Change: In Etesian & Kite, the Python interface function ::setViewer()
    was checking that the argument was indeed a CellViewer, but in text
    mode it is None. Now, silently ignore the argument if it cannot be
    converted into CellViewer.
2015-06-08 12:01:32 +02:00
Jean-Paul Chaput 51043df640 Merge "collections" branch from <github> (G. Gouvine).
* New: In Hurricane, in Collection add simple STL iterator support.
    So now the C++11 "for" instruction can be used instead of the
    in-house "forEach".
      Example:
         forEach ( Component*, icomponent, net->getComponents() ) {
           cout << (*icomponent) << endl;
         }
      Become:
         for ( Component icomponent : net->getComponents() ) {
           cout << icomponent << endl;
         }
2015-06-08 11:51:09 +02:00
Jean-Paul Chaput 2906d90b04 Re-activate the LEF/DEF symbolic exporter (for benchmarking).
* Change: In bootstrap, in FindLEFDEF.cmake, adds my personal path where
    the LEF/DEF libraries are to be found (~jpc/oa/lefdef/5.7-s038/).
* Change: In CRL Core, in LEF/DEF exporters, use the default routing
    gauge and cell gauge, instead of systematically requiring "sxlib".
      IMPORTANT: In order to build a *shared* library including the
    *static* LEF/DEF libraries, those libraries, even if static, must
    be build with the "-fPIC" flag (otherwise the compiler complains).
    I have done so on my 64 bit build of LEF/DEF, but it's a completly
    *local* patch. You may have to do it manually on your installations.
2015-06-07 14:12:00 +02:00
Jean-Paul Chaput 9ac199f11b Change in policy for duplicate libraries.
* Change: In CRL Core, replace duplicated libraries, even when performing
    a Append/Prepend operation. Also correct a bug in library name
    uniquification, event if it's no used. The policy in cas of duplicate
    libraries is not completly clear for me, still.
2015-06-07 11:05:01 +02:00
Jean-Paul Chaput 445104eaf7 Start to support high DPI screen (> 192dpi).
* New: In Hurricane, in Graphics, add a new static method ::isHighDpi()
    which returns true if the DPI is greater than 192. A "normal" screen
    is typically 96dpi, we sets the trigger at twice that value.
      Then in all the widgets with size settings, we uses that method to
    select the more appropriate size.
2015-06-06 18:41:28 +02:00
Gabriel Gouvine fd994e51fe Merged bug fixes and improvements
* Steiner tree topology
* Install path detection
* Additional Alliance layer
* Blif parser presented first
2015-06-02 10:36:21 +02:00
Jean-Paul Chaput 20ac9080d6 Do not generate IEEE VHDL when driving vst files (silly me). 2015-05-21 14:55:38 +02:00
Jean-Paul Chaput f8a72288aa Better handling of exceptions between C++ & Python. Misc. checks.
* Bug: In Hurricane, in PyHurricane.h the macro HCATCH was not catching
    standard STL exceptions. This was the source of the cryptic message:
        "Fatal Python error: Py_EndInterpreter: thread still has a frame"
    The Python interpreter was interrupted uncleanly bypassing it's own
    exceptions mechanism.
      In PyViewer, the Viewer *do not* inherit from a base class (in the
    Python export).
* New: In Hurricane, in DbU, compute maximum values (in double) for
    grid, lambda & physical (in meter) so now the DbU::toGrid(),
    DbU::toLambda() & DbU::toPhysical() methods can check for out of
    bound values, and throw an exception.
* Change: In Hurricane, ExceptionWidget::catchAllWrapper() now returns
    a boolean, set to <true> if an exception has been catched. Allow
    callers to interrupt themselves if a problem has occured.
* Bug: In Kite & Etesian, in the Python wrapper, send a Python exception
    if catchAllwrapper() did return true, instead of continuing...
* Change: In Kite & Etesian, adds a setViewer() method (exported in Python)
    to use the graphical ExceptionWidget when in graphic mode.
* Bug: In Cumulus, in PadsCorona.py the check for the core vs. chip size
    was not returning False when invalid.
* New: In CRL Core, in Vst driver, add a support IEEE VHDL. Inactive for
    now as I don't see clearly the policy for selecting it or not.
      Remove the code of the old Vst driver.
      In Blif parser, check for non-existent models (incomplete or
    corrupted Blif file). Found by G. Gouvine.
* New: Added extras file for IDE-like support under Emacs.
2015-05-20 14:03:59 +02:00
Jean-Paul Chaput 909f86b4fc Added support for IEEE VHDL in the Vst parser (std_logic).
* New: In CRL Core, in VstParser, support IEEE VHDL, with tokens
    <library> and <use>. If "use IEEE.std_logic_1164.ALL" is present
    the file will be considered to be IEEE compliant.
      To be precise, the parser now support any mix between Alliance
    and IEEE VHDL. So you can have both <std_logic> and <wor_bit>
    in the same file, but it is unclean to do that.
      The two extensions ".vhd" & ".vhdl" are supported.
      The drivers still always creates Alliance VHDL.
2015-05-10 17:16:00 +02:00
Jean-Paul Chaput a2d4f01ca3 New Library Manager Widget. Access with Tools menu or CTRL+M.
* New: In CRL Core, created a LibraryManager widget. It provides a
    composite information based on what is present, for each
    Alliance library:
    1. - A Cell in memory, without Catalog::State.
    2. - A Catalog::State, with or whithout the Cell in memory.
    3. - The files of the Cell in the librariy's directory.
    4. - A file with a format referenced for one of the importers.
      File type recognition is based *only* on the file extension,
    so it may easily confused. Be careful about what you put in
    the library's directory.
      One of the big limitation is that it will not display Hurricane
    libraries that do not have the AllianceLibrary extension.
      This widget is put in a separate library <libmanager>, included
    in the default CRLCORE_LIBRARIES.
* Change: In CRL Core, in State (through the loader), now sets the
    InMemory flag (event if nobody uses it yet...). Display it in
    the state _getString().
      In AllianceFramework, new getAllianceLibraries() method.
      In CatalogExtension, make the static method "get()" publicly
    accessible, for sometimes we want the whole State.
* Bug: In vlsisapd, in Path, the pathcache was not rebuild when it
    should, leading to incorrect results.
* New: In vlsisapd, in Path, added a listdir() method to access the
    contents of a directory and a stat() method to poll the status
    of a file/directory.
      Rename the ".string()" method in ".toString()" to avoid
    tricky name resolution with std::string, refactor in all the
    other tools.
* Change: In Hurricane, in Controller, no longer oversize the fonts
    of the table's headers.
* New: In Unicorn, in UnicornGui, integrate LibraryManager.
2015-05-09 17:03:17 +02:00
Gabriel Gouvine dc0485935d Better error messages
* Error messages are more explicit in Ap and Blif parsers
* Warns when not using tie cells
* New layer synonym in ApParser for easier format conversion
* Blif import is now on top
2015-05-02 22:10:42 +02:00
Jean-Paul Chaput 06e5e3060c Complete rewrite of the VHDL (Vst) driver. True handling of vectors.
* Bug: In Hurricane, in NetAlias, bad Record construction of the _next
    field.
* New: In CRL Core, in VstDriver complete replacement of the old Vst
    driver. Needed cleaner architecture to manage correctly files
    importeds through the Blif parser, which are Verilog like.
      It is build as an extension trough property and is not kept
    in sync with the Cell. So it's use should be transient only.
* Change: In CRL Core, in NamingScheme forgot to change '.' (dot)
    forbidden character into '_'.
* Change: In Cumulus, in the RSave plugins, remove the VHDL extensions
    after saving.
2015-05-02 18:39:35 +02:00
Jean-Paul Chaput 479429e12d Support for .gates and .mlatch in Blif. Ap parser beautifying. 2015-04-29 10:41:43 +02:00
Jean-Paul Chaput 770b1fbbbc Support for Uniquification. Rewrite of the Blif parser.
* New: In Hurricane, In NetAlias & Net, add an AliasList collection to
    iterate over all the aliases names (this *not* include the main
    net name).
* New: In Hurricane, In Cell, Instance & Net add support for cloning and
    uniquification (update documentation).
      All Cells that are uniquified from a given model are kept in an
    Uniquify relation. This relation allows to get all the clones and
    generate unique clone names by adding a "_uXX" suffix.
* Bug: In Hurricane, the Cell::_isFlattenLeaf attribute was not initialized
    in the constructor.
* Change: In CRL Core, in AllianceFramework::getCell(), no longer destroy
    a partially loaded Cell in case of parser failure, let the incomplete
    Cell be.
* New: In CRL Core, in ApParser, if all the instances are placed, sets the
    Cell::Placed flag.
* Change: In CRL Core, in BlifParser, complete rewrite of the parser.
    Not so good an idea afterwards...
* New: In Etesian, uniquify the design before placing.
* Change: In Kite, display the list of unrouted wired after all other
    statistics.
2015-04-25 16:52:18 +02:00
Jean-Paul Chaput 4023481da3 Add a state to Cell to know if is placed and/or routed.
* New: In Hurricane, In Cell, add Placed and Routed flags to know the
    state of the Cell.
* Change: In CRL Core, In ApDriver, do not save the RoutingPads as
    external connectors if the design is *not* routed (create
    conflics on reload with the newly generated RoutingPads).
* Change: In Etesian, set the Placed flag on the Cell.
* Change: In Kite, set the Routed flag on the Cell.
* Change: In Cumulus, in RSavePluginAll, save the layout only if it
    has a bounding box.
2015-04-16 16:52:33 +02:00
Jean-Paul Chaput ef9936e87c Support for Net alias names. Blif parser enhancements.
* New: In Hurricane, In Net & Cell, support for Net aliases names.
    Use a structure based on a simple ring of NetAliasHook. The Net
    holds a global map, sorted by names of all the aliases of all Nets.
    Elements NetAliasesHook of the map are slaves of ring whose master
    is an attribute of the Net (it is *not* in the map, as the primary
    name of the Net).
      In case of merge, the aliases of both Nets are merged and the
    name of the merged one become an alias.
      The Cell::getNet() looks in both the Net map and the aliases to
    find a Net by name.
* Bug: In CRL Core, in coriolisInit.py, reoder the loading of the
    configuration files so the real technology is read as early as
    possible to set up the <gridsPerLambda> factor before any lambda
    is actually computed...
* Bug: In CRL Core, in AcmSigda, do not try to fed the file when it
    has failed to be opened. Throw a clean exception instead.
* New: In CRL Core, in Toolbox, add a NamingScheme object to convert
    a design into VHDL compliant names (mainly from Blif/Verilog).
    This is extensible in any case.
* New: In CRL Core, in BlifParser, slightly more informative warning
    messages. Align the loading progress information on the other
    parsers.
      Add a capability to select which component of the design will
    be returned, if there are more than one. Use the "." as separator.
    For exemple you can request "Processor.Alu", which will load
    the "Alu" component from the design in "Processor.blif".
      To be able to save a Blif loaded design, systematically convert
    all the name for VHDL compliance, as it is the format used by
    the Coriolis native files (vst).
      Export the Blif parser to the Python interface.
* New: In Kite, In NegociateWindow, add a counter of the number of
    remaining events. Gives an idea of the ETA...
* New: In Unicorn, in cgt.by, add an option to load a Blif design from
    the command line.
* New: In Cumulus, new RSave plugin to save both netlist & layout.
    Partly redundant with the previous one. Have to better organize
    that later.
2015-04-16 15:40:02 +02:00
Jean-Paul Chaput 2cbb072e6c Merge branch 'github/Blif', fast blif parser. 2015-04-13 18:55:06 +02:00
Jean-Paul Chaput db60fe0aa6 New coriolis launcher. Configuration files cleanup.
* Change: In CRL Core, simplify the loading sequence. The technology,
    both symbolic and real is now loaded directly from coriolisInit.py
    and not through the Alliance loader. This was a leftover from the
    time configuration was in XML. Remove others traces of XML loading.
      Remove SYMB_TECHNO_NAME, REAL_TECHNO_NAME & DISPLAY from the Alliance
    environement, as they was no longer used.
      Note that technology *still* need to be loader *after* Alliance
    framework has been initialized.
      Gauge information is moved from <alliance.conf> to <kite.conf>.
* Bug: In Coloquinte, in optimization_subproblems.cxx static variables
    must not be inlined. Generate a problem when linking in debug mode
    (seems the symbol gets optimised out).
* Bug: In Katabatic, in Grid::getGCell(), when the coordinate is *outside*
    the area, do not try to find a GCell, directly return NULL.
* New: In Unicorn, create a generic command launcher named "coriolis" which
    automatically take cares of all environement setup, then run a command
    by default, it's <cgt>, but it can be anything. For example: <zsh>.
2015-04-13 18:54:09 +02:00
Gabriel Gouvine 575b6c923a Performance improvements for the BLIF parser
Got rid of streams
2015-04-13 17:38:51 +02:00
Gabriel Gouvine d7f9e5cb87 Handling aliases of non-instantiated nets
For example $true and $false in Yosys
2015-04-13 16:49:06 +02:00
Gabriel Gouvine 7d5338c9be Support for aliases defined with .names construct 2015-04-13 14:13:03 +02:00
Gabriel Gouvine 4035a6cb46 Supports several models in a Blif file 2015-04-12 16:24:29 +02:00
Jean-Paul Chaput 9e672ffaa8 Adapt the rpm automated build system of bootstrap (pass 1) 2015-04-08 00:13:27 +02:00
Jean-Paul Chaput 71e1c188ea Remove obsolete XML config files. Add stub technos cmos065 & c35b4.
* New: In CRL Core, remove obsoleted XML files, no longer needed by
    Chams. Add stub for technologies CMOS065 (ST) and C35B4, aka
    AMS 035.
* Bug: In Knik, update the path where to find the FLUTE lookup tables.
    (from 2.4 to 3.1).
2015-04-06 12:49:27 +02:00
Gabriel Gouvine aa17b90bea Doc for Yosys and Etesian + minor fixes
* Blif import checks if the file exists
* Typo in Knik
2015-04-05 11:35:06 +02:00
Jean-Paul Chaput c63ee783ed Rename BlifDriver.cpp to BlifParser.cpp ;-) 2015-04-04 17:39:15 +02:00
Gabriel Gouvine 3351574077 Fixed typo 2015-04-03 11:29:55 +02:00
Gabriel Gouvine 69b6f5acba Adding VDD/VSS to the current design 2015-03-31 18:31:41 +02:00
Gabriel Gouvine 18958d8f31 Basic BLIF parser for Yosys interface 2015-03-27 15:51:58 +01:00
Jean-Paul Chaput 1e73466199 Added new CMake macro add_python_module() and some cleanup. 2015-03-22 19:12:45 +01:00
Jean-Paul Chaput 69c75b9ea9 Rewrite the Unicorn ImportCell to allow new formats to be hooked in.
* New: In Hurricane, In CellWidget, add methods to emit CellPreModificated
    and CellPostModificated Qt signals (from non-Qt aware objects).
* New: In Unicorn, In ImportCell, parsers are now dynamically hooked
    in the importer, allowing third party application (i.e. Chams) to
    add their own. See the ImportCell::addImporter() method.
* Bug: In Unicorn, in FindUNICORN.cmake, seems to be unable to detect
    the UnicornGui.h. Not a blocking problem because the include dir
    is shared with other tools correctly detected. But still...
2015-03-21 17:29:04 +01:00
Jean-Paul Chaput 393b5a735f Remove simulated annealing placer Nimbus/Metis/Mauka. 2015-03-17 22:50:00 +01:00
Jean-Paul Chaput 5dc60415e7 Happy new year 2015! 2015-03-17 16:56:55 +01:00
Jean-Paul Chaput a7c4e8b02e Python Script launcher extended to accomodate Chams.
* New: In VLSISAPD, in Configuration, add a new priority level UserFile
    to distinguish between the system configuration files and the user's
    configuration files (which take precedence).
* New: In Hurricane, in Script (Python), improve the API to be able
    to support Chams (and remove the duplicate capability from it).
      Add separate functions to perform the initialize/run(s)/finalize
    cycle step by step.
* Change: In CRL Core, rename real technology <hcmos9> to <hcmos9gp>,
    it's offcial name from CMP/ST. This is the 130nm.
      Move the reading of the symbolic & real technologies names from
    coriolisInit.py to helpers.__init__.py, to be shared with
    chamsInit.py.
      To avoid a clash of names inside of helpers, the two variables
    of techno.py are renamed "symbolicTechnology" and "realTechnology".
      Move python init system from crlcore/src/crlcore to crlcore/python.
* New: In CRL Core, In Utilities, add site-packages/pharos to the
    PYTHONPATH.
* Change: In Kite, move python init system from kite/src/init to
    kite/python.
2015-03-17 16:31:24 +01:00
Jean-Paul Chaput 4d184c7a75 Added etesian.conf in ispd05 symbolic technology. 2015-03-02 23:44:55 +01:00
Jean-Paul Chaput bddf1ceef5 Ispd05 bookshelf parser bad scaling bug correction.
* Bug: In CRL Core, in Ispd05Bookshelf, as the pitch is already expressed
    in DbU, do not apply DbU::toLambda() in any expression where it is used.
* Change: In Etesian, In AddFeeds, do not try insert feeds if there is no
    cell feed avalaible.
2015-03-02 23:29:08 +01:00
Jean-Paul Chaput 8566126acc Adding Configuration support to Etesian.
* Change: In Bootstrap & ccb, the coloquinte project is renamed into
    "importeds", it will be the home of all the externally
    devellopped softwares that are needed to build Coriolis.
      Add explicit support for Fedora ("Linux.fc") and uses
    site-packages, as everybody else.
* New: In CRL Core, in etc/, adds the configuration files for Etesian.
* New: In Etesian, activate the Configuration object. Now uses it's
    own configuration variables instead of borrowing those of
    Nimbus & Mauka.
* Change: In Documentation, updated User's Guide to present Etesian
    as the placer, instead of Mauka.
* Change: In Cumulus, slight change in ClokTreePlugin and ChipPlugin
    to match the new Etesian/Python interface.
2015-02-27 18:16:03 +01:00
Jean-Paul Chaput bd3984a313 Correctly manage clock net isolateds from the main clock.
* New: In Bootstrap, in ccb.py, check if cmake is installed and issue
    a warning, if not.
* New: In Hurricane, added Cell::getDeepNet() to search for a deepnet
    given a path and a leaf net. This method is slow and must not be
    used too often. Introduced for Kite::BuildPowerRails().
* Change: In CRL Core, in cmos/alliance.conf, modify the clock name
    pattern to match the sub-clock signals in the datapath operators.
* Bug: In Etesian, do not blindly reset the top cell abutment-box.
    Do it only if it's empty, otherwise keep it.
* Bug: In Kite, in buildPowerRails(), in getRootNet() the management
    of clock nets was incomplete. The case of unrouted clock nets
    that where not connected to the top core clock net, like the
    one in the datapath registers was faulty. They were partly
    recognized as unrouteds and partly as blockage generating a
    routing deadlock: routage impossible due to blockage generated
    from itself...
* New: In Stratus1, add a buildModel() utility function to automate
    the model generation and allow a call by the model name (string).
* Change: In Unicorn, in cgt.py, display the Alliance environement.
2015-02-25 22:22:16 +01:00
Jean-Paul Chaput 6d366a08bc Etesian integration with Chip & ClockTree plugins.
* New: In Hurricane, in DebugSession, add a new method to activate the
    trace inconditionally with a certain level.
* New: In Hurricane, in HyperNet, allow copy construction as there is
    no reason to disallow it and we need it now.
* New: In Hurricane, in Cell::flattenNets(), add a new option to prevent
    the flattening of the clock net(s). For more safety perform the
    DeepNet creation *outside* the Collection loop.
* Bug: In Hurricane, in Cell_HyperNetRootNetOccurrences, skip the
    DeepNets because they are the result of another flattening operation.
* New: In Isobar, in PyBasicLayer, export C++ method getBlockageLayer().
* New: In Isobar, in PyRoutingGauge, export C++ method getLayerPitch(),
    needed by Cumulus plugins.
* New: In Etesian, EtesianEngine::findYSpin() to look for the Y orientation
    if some cells are already placed. Typically the buffers of a clock
    tree.
      Pass the correct orienation to row_compatible_orientation().
      Do not try to add feeds in the ISPD05 benchmarks. For now the
    benchmarks are detected through their names (unreliable).
* Change: In Knik, in KnikEngine::initGlobalRouting(), allow the clock
    to be routed as an ordinary signal when the clock tree is not
    used.
* New: In Kite, in BuildPowerRails, management & detection for the
    pre-routed clock.
      In KiteEngine constructor, early initialization of the blockage
    net to avoid later troubles in BuildPowerRails.
* New: In Cumulus, in ChipPlugin, add support for Etesian plus new
    configuration parameter 'clockTree.placerEngine' to select between
    Mauka and Etesian.
* New: In Cumulus, in BlockCorona, add blockages in the vertical sides
    in the vertical layer to prevent the router to use the vertical
    tracks in under the prower lines (for example, blockage in M3
    with power line M5).
      In Cumulus, in ChipConf add attribute to access the blockage net.
* New: In Cumulus, when the clock tree is disabled, do not generate
    the last rail around the block (the clock rail).
* Bug: In Cumulus, in ChipConf use the clock pad to guess the clock
    signals and *not* the power pad.
      Add more meaningful error messages if a pad global signal is
    not found (implicit connexion by name).
* Bug: In Cumulus, in ClockTree, compute correctly the cells Y spin,
    that is *from the bottom of the cell AB* (not from 'zero').
2015-02-24 13:13:17 +01:00
Jean-Paul Chaput 3b343f08cf Bug in Python proxy deallocation. Update to latest Coloquinte.
* Bug: In Bootstrap, in coriolisEnv.py, check if devtoolset-2 is already
    active before launching it as a sub-shell.
* Bug: In Isobar, In PyHurricane.h, DBoDestroyAttribute() set the proxy
    pointer toward the C++ object to NULL. So when the Python object is
    deleted no double-deletion occurs on the C++ object.
      Add some more trace information in Python link/dealloc.
* Change: In CRL Core, in cyclop, make CMakeLists.txt automatically
    choose the right rule for linking the binary wether we use Qt 4 or
    Qt 5. Very irksome problem.
* New: In EtesianEngine::addFeed(), do not take into account instances
    that are not placed entirely inside the top cell abutment box (was
    causing a core dump).
* Bug: In Katabatic, in GCellQueue, correct a mismatch between a GCell
    set and the iterators used upon it.
* Bug: In Mauka, in Row & Surface correct a mismatch between a container
    and it's iterator.
* New: In Etesian, updated to work with the latest Coloquinte, patch
    contributed by G. Gouvine.
      Added EtesianEngine::setDefaultAb() to compute an abutment box if
    the Cell is completly unplaced.
* New: In cumulus, in ClockTree, now the placer can be configured to be
    either Mauka (slow simulated annealing) or Etesian (fast analytic).
    New setting 'clockTree.placerEngine' in plugin settings.
2015-02-13 23:38:55 +01:00